PEB2256H-V12 Infineon Technologies, PEB2256H-V12 Datasheet - Page 140
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PEB2256H-V12
Manufacturer Part Number
PEB2256H-V12
Description
IC INTERFACE LINE 3.3V 80-MQFP
Manufacturer
Infineon Technologies
Datasheet
1.PEB2256H-V12.pdf
(490 pages)
Specifications of PEB2256H-V12
Applications
*
Interface
*
Voltage - Supply
*
Package / Case
80-SQFP
Mounting Type
Surface Mount
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
PEB2256H-V12
PEB2256H-V12IN
PEB2256H-V12IN
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PEB2256H-V12
Manufacturer:
Infineon Technologies
Quantity:
10 000
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• User controlled, exclusively, by the control bits described above in the non-auto mode
5.2.3
FT and FS bit conditions, i.e. pulse frame alignment and multiframe alignment can be
handled separately if programmed by bit FMR2.SSP. Thus, a multiframe
resynchronization can be automatically initiated after detecting 2 errors out of 4/5/6
consecutive multiframing bits without influencing the state of the terminal framing.
In the synchronous state, the setting of FMR0.FRS or FMR0.EXLS resets the
synchronizer and initiates a new frame search. The synchronous state is reached if there
is only one definite framing candidate. In the case of repeated apparent simulated
candidates, the synchronizer remains in the asynchronous state.
In asynchronous state, the function of FMR0.EXLS is the same as above. Setting bit
FMR0.FRS induces the synchronizer to lock onto the next available framing candidate if
there is one. Otherwise a new frame search is started. This is useful in case the framing
pattern that defines the pulseframe position is imitated periodically by a pattern in one of
the speech/data channels.
The control bit FMR0.EXLS should be used first because it starts the synchronizer to
search for a definite framing candidate.
To observe actions of the synchronizer, the Frame Search Restart Flag FRS0.FSRF is
implemented. It toggles at the start of a new frame search if no candidate has been found
at previous attempt.
When resynchronization is initiated, the following values apply for the time required to
achieve the synchronous state in case there is one definite framing candidate within the
data stream:
Table 32
Frame Mode
F4
F12
ESF
F72
Data Sheet
(FMR4.AUTO = 0).
Addition for F12 and F72 Format
Resynchronization Timing (T1/J1)
Average
1.0
3.5
3.4
13.0
140
Maximum
1.5
4.5
6.125
17.75
Functional Description T1/J1
Units
ms
FALC56 V1.2
PEB 2256
2002-08-27
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