PEB2256H-V12 Infineon Technologies, PEB2256H-V12 Datasheet - Page 301
PEB2256H-V12
Manufacturer Part Number
PEB2256H-V12
Description
IC INTERFACE LINE 3.3V 80-MQFP
Manufacturer
Infineon Technologies
Datasheet
1.PEB2256H-V12.pdf
(490 pages)
Specifications of PEB2256H-V12
Applications
*
Interface
*
Voltage - Supply
*
Package / Case
80-SQFP
Mounting Type
Surface Mount
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
PEB2256H-V12
PEB2256H-V12IN
PEB2256H-V12IN
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PEB2256H-V12
Manufacturer:
Infineon Technologies
Quantity:
10 000
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- Download datasheet (6Mb)
E-Bit Error Counter (Read)
EBCL
EBCH
EB(15:0)
Data Sheet
EB15
EB7
7
7
E-Bit Errors
If doubleframe format is selected, FEBEH/L has no function. If CRC-
multiframe mode is enabled, FEBEH/L works as submultiframe error
indication counter (16 bits) which counts zeros in S
frame 13 and 15 of every received CRC multiframe. The error counter
does not roll over.
During alarm simulation, the counter is incremented once per
submultiframe up to its saturation.
Clearing and updating the counter is done according to bit
FMR1.ECM.
If this bit is reset the error counter is permanently updated in the
buffer. For correct read access of the error counter bit DEC.DEBC
has to be set. With the rising edge of this bit updating the buffer is
stopped and the error counter is reset. Bit DEC.DEBC is reset
automatically with reading the error counter high byte.
If FMR1.ECM is set every second (interrupt ISR3.SEC) the error
counter is latched and then automatically reset. The latched error
counter state should be read within the next second.
301
FALC56 V1.2
i
EB0
EB8
-bit position of
E1 Registers
0
0
PEB 2256
2002-08-27
(56)
(57)
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