PEB2256H-V12 Infineon Technologies, PEB2256H-V12 Datasheet - Page 35
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PEB2256H-V12
Manufacturer Part Number
PEB2256H-V12
Description
IC INTERFACE LINE 3.3V 80-MQFP
Manufacturer
Infineon Technologies
Datasheet
1.PEB2256H-V12.pdf
(490 pages)
Specifications of PEB2256H-V12
Applications
*
Interface
*
Voltage - Supply
*
Package / Case
80-SQFP
Mounting Type
Surface Mount
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
PEB2256H-V12
PEB2256H-V12IN
PEB2256H-V12IN
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PEB2256H-V12
Manufacturer:
Infineon Technologies
Quantity:
10 000
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Table 2
Pin
No.
5
Data Sheet
Ball
No.
C1
Pin Definitions - Line Interface (cont’d)
Symbol
XL2
XDON
XFM
Input (I)
Output (O)
Supply (S)
O (analog) Transmit Line 2
O
O
Function
Analog output for the external transformer.
Selected if LIM1.DRS is cleared. After reset
this pin is in high-impedance state until bit
FMR0.XC1 is set and XPM2.XLT is cleared.
Transmit Data Output Negative
This digital output for transmitted dual-rail
PCM(-) route signals can provide
- half bauded signals with 50% duty cycle
(LIM0.XFB = 0) or
- full bauded signals with 100% duty cycle
(LIM0.XFB = 1)
The data is clocked on positive transitions of
XCLK in both cases. Output polarity is selected
by bit LIM0.XDOS (after reset: active low).
The dual-rail mode is selected if LIM1.DRS
and FMR0.XC1 are set. After reset this pin is in
high-impedance state until register LIM1.DRS
is set and XPM2.XLT cleared.
Transmit Frame Marker
This digital output marks the first bit of every
frame transmitted on port XDOP. This function
is only available in the optical interface mode
(LIM1.DRS = 1 and FMR0.XC1 = 0). Data is
clocked on positive transitions of XCLK. After
reset this pin is in high-impedance state until
register LIM1.DRS is set and XPM2.XLT
cleared.
In remote loop configuration the XFM marker is
not valid.
35
Pin Descriptions
FALC56 V1.2
PEB 2256
2002-08-27
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