PEB2256H-V12 Infineon Technologies, PEB2256H-V12 Datasheet - Page 202

• Manufacturer Part Number: PEB2256H-V12
• Description: IC INTERFACE LINE 3.3V 80-MQFP
• Manufacturer: Infineon Technologies

Specifications of PEB2256H-V12

• Applications: *
• Interface: *
• Voltage - Supply: *
• Package / Case: 80-SQFP
• Mounting Type: Surface Mount
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: PEB2256H-V12; PEB2256H-V12IN

8.1.2
(MODE.MDS(2:0) = 101; MODE2.MDS2(2:0)=101; MODE3.MDS3(2:0)=101)
Characteristics: address recognition, flag- and CRC generation/check, bit stuffing
Only the high byte of a 2-byte address field is compared to registers RAH(2:1). The
whole frame excluding the first address byte is stored in RFIFO (RFIFO2, RFIFO3).
8.1.3
(MODE.MDS(2:0) = 100; MODE2.MDS2(2:0)=100; MODE3.MDS3(2:0)=100)
Characteristics: flag- and CRC generation/check, bit stuffing
No address recognition is performed and each frame is stored in the RFIFO (RFIFO2,
RFIFO3).
8.1.4
SS7 protocol is supported for channel 1 only by means of several hardware features as
described in
8.1.5
The following figure gives an overview of the management of the received HDLC frames
in the different operating modes.
Data Sheet
Transparent Mode 1
Transparent Mode 0
SS7 Support
Receive Data Flow
Chapter 4.1.14.2
on page
74
202
and
Signaling Controller Operating Modes
Chapter 5.1.14.2
on page 135.
FALC56 V1.2
PEB 2256
2002-08-27