PEB2256H-V12 Infineon Technologies, PEB2256H-V12 Datasheet - Page 99

• Manufacturer Part Number: PEB2256H-V12
• Description: IC INTERFACE LINE 3.3V 80-MQFP
• Manufacturer: Infineon Technologies

Specifications of PEB2256H-V12

• Applications: *
• Interface: *
• Voltage - Supply: *
• Package / Case: 80-SQFP
• Mounting Type: Surface Mount
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: PEB2256H-V12; PEB2256H-V12IN

XL1/2 and if the transmit line current drops below the detection limit the high-impedance
state is cleared.
Two conditions are detected by the monitor: transmit line de-jitteredity (more than 31
consecutive zeros) indicated by FRS1.XLO and transmit line high current indicated by
FRS1.XLS. In both cases a transmit line monitor status change interrupt is provided.
Figure 25
4.4.7
Similar to the receive signaling controller the same signaling methods and the same time
slot assignment is provided. The FALC56 performs the following signaling and data link
methods.
4.4.7.1
The transmit signaling controller of the FALC56 performs the flag generation, CRC
generation, zero-bit stuffing and programmable idle code generation. Buffering of
transmit data is done in the 64 byte deep XFIFO. The signaling information is internally
multiplexed with the data applied to port XDI or XSIG.
In signaling controller transparent mode, fully transparent data transmission without
HDLC framing is performed. Optionally the FALC56 supports the continuous
transmission of the XFIFO contents.
The FALC56 offers the flexibility to insert data during certain time slots. Any
combinations of time slots can be programmed separately for the receive and transmit
direction if using HDLC channel 1. HDLC channel 2 and 3 support one programmable
time slot common for receive and transmit direction each.
Data Sheet
Transmit Signaling Controller (E1)
HDLC or LAPD access
Transmit Line Monitor Configuration (E1)
XL1
XL2
Monitor
99
Line
TRI
Shaper
Pulse
Functional Description E1
XDATA
ITS10936
FALC56 V1.2
PEB 2256
2002-08-27