s3c4510b Samsung Semiconductor, Inc., s3c4510b Datasheet - Page 136

• Manufacturer Part Number: s3c4510b
• Description: 16/32-bit Risc Microcontroller
• Manufacturer: Samsung Semiconductor, Inc.

INSTRUCTION SET
FORMAT 18: UNCONDITIONAL BRANCH
OPERATION
This instruction performs a PC-relative Branch. The THUMB assembler syntax is shown below. The branch offset
must take account of the prefetch operation, which causes the PC to be 1 word (4 bytes) ahead of the current
instruction.
NOTE: The address specified by label is a full 12-bit two s complement address,
Examples
here
Jimmy
3-94
THUMB Assembler
but must always be half-word aligned (ie bit 0 set to 0), since the assembler places label >> 1 in the Offset11 field.
B label
15
1
B here
B jimmy
...
...
14
1
13
1
BAL label (half-word offset) Branch PC relative +/- Offset11 << 1, where label is PC
12
0
ARM Equivalent
Table 3-25. Summary of Branch Instruction
11
0
10
[10:0] Immediate Value
Figure 3-47. Format 18
; Branch onto itself. Assembles to 0xE7FE.
; (Note effect of PC offset).
; Branch to 'jimmy'.
; Note that the THUMB opcode will contain the number of
; half-words to offset.
; Must be half-word aligned.
+/- 2048 bytes.
Offset11
Action
0
S3C4510B