s3c4510b Samsung Semiconductor, Inc., s3c4510b Datasheet - Page 22

• Manufacturer Part Number: s3c4510b
• Description: 16/32-bit Risc Microcontroller
• Manufacturer: Samsung Semiconductor, Inc.

PRODUCT OVERVIEW
SPECIAL REGISTERS
1-22
System
Manager
Ethernet
(BDMA)
Group
SYSCFG
CLKCON
EXTACON0
EXTACON1
EXTDBWTH
ROMCON0
ROMCON1
ROMCON2
ROMCON3
ROMCON4
ROMCON5
DRAMCON0
DRAMCON1
DRAMCON2
DRAMCON3
REFEXTCON
BDMATXCON
BDMARXCO
N
BDMATXPTR
BDMARXPTR
BDMARXLSZ
BDMASTAT
CAM
BDMATXBUF
BDMARXBUF
Registers
0x9100–
0x9200–
0x9800–
0x92FC
0x99FC
0x300C
0x301C
0x302C
0x303C
0x900C
0x917C
0x0000
0x3000
0x3008
0x3010
0x3014
0x3018
0x3020
0x3024
0x3028
0x3030
0x3034
0x3038
0x9000
0x9004
0x9008
0x9010
0x9014
Offset
Table 1-5. S3C4510B Special Registers
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
W
System configuration register
Clock control register
External I/O timing register 1
External I/O timing register 2
Data bus width for each memory bank
ROM/SRAM/Flash bank 0 control register
ROM/SRAM/Flash bank 1 control register
ROM/SRAM/Flash bank 2 control register
ROM/SRAM/Flash bank 3 control register
ROM/SRAM/Flash bank 4 control register
ROM/SRAM/Flash bank 5 control register
DRAM bank 0 control register
DRAM bank 1 control register
DRAM bank 2 control register
DRAM bank 3 control register
Refresh and external I/O control register
Buffered DMA receive control register
Buffered DMA transmit control register
Transmit frame descriptor start address
Receive frame descriptor start address
Receive frame maximum size
Buffered DMA status
CAM content (32 words)
BDMA Tx buffer (64 words) for test mode
addressing
BDMA Rx buffer (64 words) for test mode
addressing
Description
0x37FFFF91
Reset/Value
0x000083FD
0x00000000
0x00000000
0x00000000
0x00000000
0x20000060
0x00000060
0x00000060
0x00000060
0x00000060
0x00000060
0x00000000
0x00000000
0x00000000
0x00000000
0x00000000
0x00000000
0x00000000
0x00000000
0x00000000
Undefined
Undefined
Undefined
Undefined
S3C4510B