s3c4510b Samsung Semiconductor, Inc., s3c4510b Datasheet - Page 43

• Manufacturer Part Number: s3c4510b
• Description: 16/32-bit Risc Microcontroller
• Manufacturer: Samsung Semiconductor, Inc.

S3C4510B
3
INSTRUCTION SET SUMMAY
This chapter describes the ARM instruction set and the THUMB instruction set in the ARM7TDMI core.
FORMAT SUMMARY
The ARM instruction set formats are shown below.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Some instruction codes are not defined but do not cause the Undefined instruction trap to be taken, for
instance a Multiply instruction with bit 6 changed to a 1. These instructions should not be used, as their
action may change in future ARM implementations.
Cond
Cond
Cond
Cond
Cond
Cond
Cond
Cond
Cond
Cond
Cond
Cond
Cond
Cond
Cond
0 0 1
0 0 0 0 0 0 A S
0 0 0 0 1 U A S
0 0 0 1 0 B 0 0
0 0 0 1 0 0 1 0 1 1 1 1 1 1 1 1 1 1 1 1 0 0 0 1
0 0 0 P U 0 W L
0 0 0 P U 1 W L
0 1 1 P U B W L
0 1 1
1 0 0 P U S W L
1 0 1 L
1 1 0 P U N W L
1 1 1 0
1 1 1 0
1 1 1 1
INSTRUCTION SET
Opcode
CP Opc
CP Opc
S
L
Figure 3-1. ARM Instruction Set Format
RdHi
CRn
CRn
Rn
Rd
Rn
Rn
Rn
Rn
Rn
Rn
Ignored by processor
RnLo
CRd
CRd
Rd
Rn
Rd
Rd
Rd
Rd
Rd
NOTE
Offset
0 0 0 0 1 0 0 1
0 0 0 0 1 S H 1
Offset
CP#
CP#
CP#
Rs
Rn
Register List
1 0 0 1
1 0 0 1
1 S H 1
Operand2
CP#
CP#
Offset
Offset
1
0
1
Offset
CRm
CRm
Rm
Rm
Rm
Rm
Rn
Data processing/
PSR Transfer
Multiply
Multiply Long
Single data swap
Branch and exchange
Halfword data transfer:
register offset
Halfword data transfer:
immediate offset
Single data transfer
Undefined
Block data transfer
Branch
Coprocessor data
transfer
Coprocessor data
Operation
Coprocessor register
Transfer
Software Interrupt
INSTRUCTION SET
3-1