s3c4510b Samsung Semiconductor, Inc., s3c4510b Datasheet - Page 277

• Manufacturer Part Number: s3c4510b
• Description: 16/32-bit Risc Microcontroller
• Manufacturer: Samsung Semiconductor, Inc.

S3C4510B
RECEIVING A FRAME
The receive block, when enabled, constantly monitors a data stream coming either from the MII or, if in loop-
back mode, from the transmit block. The MII supplies from zero to seven bytes of preamble, followed by the start
frame delimiter (SFD). The receive block checks that the first nibbles received are preamble, and then looks for
the SFD (10101011) in the first eight bytes. If it does not detect the SFD by then, it treats the packet as a
fragment and discards it.
The first nibble of destination address follows the SFD, least-significant bits first. When it has received a byte,
the receive block generates parity, stores the byte with its parity in the receive FIFO, and asserts Rx_rdy. It
combines subsequent nibbles into bytes and stores them in the FIFO.
BDI RECEIVE DATA TIMING
When the system asserts Rx_rd#, the receive block reads the first byte from the FIFO, checks parity, and drives
the byte on Rx_DB, and the byte's parity on Rx_par. If the FIFO is now empty, it drops Rx_rdy. When it drives
out the last byte of a packet, it asserts Rx_EOF.
Figure 7-19 shows the timing sequence for transmitting bytes back-to-back, transmitting with wait states, and
transmitting the last byte.
Rx_EOF
Sys_clk
Rx_rd#
Rx_par
Rx_rdy
Rx_DB
PAR
B1
Figure 7-21. BDI Receive Data Timing
PAR
B2
PAR
B3
ETHERNET CONTROLLER
PAR
BN
7-55