s3c4510b Samsung Semiconductor, Inc., s3c4510b Datasheet - Page 178

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s3c4510b

Manufacturer Part Number
s3c4510b
Description
16/32-bit Risc Microcontroller
Manufacturer
Samsung Semiconductor, Inc.
Datasheet

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SYSTEM MANAGER
4-36
31
0
30 29
0
Figure 4-18. ROM/SRAM/FLASH Control Registers (ROMCON0–ROMCON5)
ROM/SRAM/Flash Bank #
Next Pointer
[1:0] Page mode configuration (PMC)
00 = Normal ROM
10 = 8-word page
[3:2] Page address access time (t
00 = 5 cycles
10 = 3 cycles
[6:4] Programmable access cycle (t
000 = Disable bank
010 = 3 cycle
110 = 7 cycle
[19:10] ROM/SRAM/Flash bank # base pointer
This value is the start address of the ROM/SRAM/Flash bank #.
The start address is calculated as ROM/SRAM/FLASH bank #
base pointer << 16.
[29:20] ROM/SRAM/FLASH bank # next pointer
This value is the current bank end address << 16 + 1.
20
19
ROM/SRAM/Flash Bank #
Base Pointer
01 = 4-word page
11 = 16-word page
01 = 2 cycles
11 = 4 cycles
001 = 2 cycles
011 = 4 cycles
111 = Reserved
PA
ACC
)
)
10
9
0 0 0
8
7
6
t
ACC
4
3
t
PA
2
PMC
1
0
S3C4510B

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