s3c4510b Samsung Semiconductor, Inc., s3c4510b Datasheet - Page 352

• Manufacturer Part Number: s3c4510b
• Description: 16/32-bit Risc Microcontroller
• Manufacturer: Samsung Semiconductor, Inc.

DMA CONTROLLER
CONTINUOUS AND ONE BURST MODE (GDMACON[14] = 1, [9] = 0 )
DREQ and DACK signals are active low.
CONTINUOUS AND FOUR DATA BURST MODE (GDMACON[14] = 1, [9] = 1 )
This timing diagram is the same with Continuous and one data burst exception four data burst.
one data burst; source address0 and source data0
four data burst; source address0 and source data0
9-16
In the four data burst mode, GDMA COUNT Register value decreases by 1 after 4 data transfer.
In_MCLK
Address
GDMA
DREQ
DACK
Data
CNT
address1 and source data1
source data2
destination address2 and destination data2
destination address1 and destination data1
NOTE:
Figure 9-14. Continuous and One Burst Mode Timing
source address3 and source data3
S0
8
S# is source address#, and D# is destination address#.
D0
7
destination address1 and destination data1
S1
6
Recommand Time
destination address0 and destination data0
NOTE
source address1 and source data1
D1
5
S2
4
destination address3 and destination data3
destination address2 and destination data2
D2
3
destination address0 and destination data0
S3
2
D3
1
0
source address2 and
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source
S3C4510B
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