s3c4510b Samsung Semiconductor, Inc., s3c4510b Datasheet - Page 345

• Manufacturer Part Number: s3c4510b
• Description: 16/32-bit Risc Microcontroller
• Manufacturer: Samsung Semiconductor, Inc.

S3C4510B
DMA CONTROLLER
Block Mode
The assertion of only one GDMA request (nXDREQ or an internal request) causes all of the data, as specified by
the control register settings, to be transmitted in a single operation. The GDMA transfer is completed when the
transfer counter value reaches zero. The nXDREQ signal can be de-asserted after checking that nXDACK has
been asserted.
nXDREQ
nXDACK
RD/WR Cycle
Figure 9-6. External DMA Requests (Block Mode)
Demand Mode
In demand mode, the GDMA continues transferring data as long as the GDMA request input (nXDREQ) is held
active.
nXDREQ
nXDACK
RD/WR Cycle
Figure 9-7. External DMA Requests (Demand Mode)
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