s3c4510b Samsung Semiconductor, Inc., s3c4510b Datasheet - Page 176

• Manufacturer Part Number: s3c4510b
• Description: 16/32-bit Risc Microcontroller
• Manufacturer: Samsung Semiconductor, Inc.

SYSTEM MANAGER
4-34
EXTDBWTH
31
0
30 29
0
0 0
28
27
DSX3
[1:0] Data bus width for ROM/SRAM/FLASH bank 0 (DSR0)
DSR0 is read-only data at the B0SIZE [1:0] pins. DSR0 is used as read-only
because ROM/SRAM/FLASH bank 0 is used to boot the ROM while the data
bus width for ROM/SRAM/FLASH bank 0 is set using B0SIZE [1:0].
00 = Not permitted
01 = Byte (8 bits)
10 = Half-word (16 bits)
11 = Word (32 bits)
[3:2] Data bus width for ROM/SRAM/FLASH bank 1 (DSR1)
[5:4] DSR2, [7:6] DSR3, [9:8] DSR4, [11:10] DSR5
00 = Disable
01 = Byte (8 bits)
10 = Half- word (16 bits)
11 = Word (32 bits)
[13:12] Data bus width for DRAM bank 0 (DSD0)
[15:14] DSD1, [17:16] DSD2, [19:18] DSD3
00 = Disable
01 = Byte (8 bits)
10 = Half-word (16 bits)
11 = Word (32 bits)
[21:20] Data bus width for external I/O bank 0 (DSX0)
[23:22] DSX1, [25:24] DSX2, [27:26] DSX3
00 = Dissable
01 = Byte (8 bits)
10 = Half-word (16 bits)
11 = Word (32 bits)
NOTE:
Figure 4-17. Data Bus Width Register (EXTDBWTH)
26
25
DSX2
24
When you select "Disable", the assigned external I/O
bank access signal is not generated.
23
DSX1
22
21
DSX0
20
19
DSD3
18
17
DSD2
16
15
DSD1
14
13
DSD0
12
11
DSR5
10
DSR4
9
8
DSR3
7
6
DSR2
5
4
DSR1
3
S3C4510B
2
DSR0
1
0