s3c4510b Samsung Semiconductor, Inc., s3c4510b Datasheet - Page 368

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s3c4510b

Manufacturer Part Number
s3c4510b
Description
16/32-bit Risc Microcontroller
Manufacturer
Samsung Semiconductor, Inc.
Datasheet

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UART
UART BAUD RATE COUNT AND CLOCK REGISTERS
For test purpose only, the internal baud rate up counters, BRDCNT0 and BRDCNT1, can be directly accessed
using register addressing. In addition, the baud rate clock can be monitored through the UART data set ready
ports, nUADSR.
If the BRDCLKn monitor value is "1", the baud rate clock can be monitored at the nUADSR pin. If it is "0" (its
default value), or if you write a "0" to the BRDCLKn address, the UARD DSR signal output to the nUADSR port
depends on the current setting of UART control register bit 5.
10-14
BRDCNT0
BRDCNT1
BRDCLK0
BRDCLK1
Register
MCLK
Baud Rate up Counter
Baud Rate Divisor
Compare Logic
(URDCNTn)
(UBRDIVn)
Offset Address
0xD01C
0xE01C
0xD018
0xE018
Figure 10-8. UART Baud Rate Clock Test Scheme
Table 10-13. BRDCNTn and BRDCLKn Registers
Match Generator
R/W
BRDCLKn
W
W
W
W
UART0 baud rate count register
UART1 baud rate count register
UART0 baud rate clock monitor
UART1 baud rate clock monitor
Baud Rate Clock
Description
Chip Internal
Chip External
nUADSR
Reset Value
S3C4510B
0x0
0x0
0x0
0x0

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