s3c4510b Samsung Semiconductor, Inc., s3c4510b Datasheet - Page 327

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s3c4510b

Manufacturer Part Number
s3c4510b
Description
16/32-bit Risc Microcontroller
Manufacturer
Samsung Semiconductor, Inc.
Datasheet

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S3C4510B
HDLC INTERRUPT ENABLE REGISTER (HINTEN)
Number
[3:0]
[10]
[11]
[12]
[13]
[14]
[15]
[16]
[17]
[18]
[19]
[20]
[21]
[22]
[23]
[24]
[25]
[26]
[27]
[28]
[29]
[30]
[31]
Bit
[4]
[5]
[6]
[7]
[8]
[9]
Registers
HINTENA
HINTENB
DPLLOMIE
RxSDCDIE
RxCRCEIE
DPLLTMIE
TxSCTSIE
DTxABTIE
RxIERRIE
RxMOVIE
RxIDLEIE
DRxNOIE
Bit Name
Reserved
Reserved
Reserved
Reserved
Reserved
DRxFDIE
DTxNOIE
RxABTIE
DRxNLIE
DTxFDIE
DTxNLIE
RxNOIE
RxOVIE
TxFCIE
RxFAIE
RxFDIE
RxFVIE
TxFAIE
TxUIE
0x700c
0x800c
Offset
Table 8-12. HINTENA and HINTENB Register
Table 8-13. HINTEN Register Description
Tx frame complete interrupt enable
Tx FIFO available to write interrupt enable
CTS transition has occurred interrupt enable
Tx under-run has occurred interrupt enable
Rx FIFO available to read interrupt enable
Rx flag detected interrupt enable
DCD transition interrupt enable
Rx frame valid interrupt enable
Idle detected interrupt enable
Abort detected interrupt enable
CRC error frame interrupt enable
Non-octet aligned frame interrupt enable
Rx overrun interrupt enable
Rx memory overflow interrupt enable
DMA Tx abort interrupt enable
Rx internal error interrupt enable
DMA Rx frame done interrupt enable
DMA Rx null list interrupt enable
DMA Rx not owner interrupt enable
DMA Tx frame done every transmitted frame interrupt enable
DMA Tx null list interrupt enable
DMA Tx not owner interrupt enable
DPLL one clock missing interrupt enable
DPLL two clocks missing interrupt enable
R/W
R/W
R/W
HDLC Interrupt Enable Register
HDLC Interrupt Enable Register
Description
Description
HDLC CONTROLLERS
Reset Value
0X00000000
0X00000000
8-41

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