s3c4510b Samsung Semiconductor, Inc., s3c4510b Datasheet - Page 319

• Manufacturer Part Number: s3c4510b
• Description: 16/32-bit Risc Microcontroller
• Manufacturer: Samsung Semiconductor, Inc.

S3C4510B
31
30 29 28 27 26 25
[0] Tx reset (TxRS)
0 = Normal
[1] Rx reset (RxRS)
0 = Normal operation
[2] DMA Tx reset (DTxRS)
0 = Normal operation
[3] DMA Rx reset (DRxRS)
0 = Normal operation
[4] Tx enable (TxEN)
0 = Tx disabled
[5] Rx enable (RxEN)
0 = Rx disabled
[6] DMA Tx enable (DTxEN)
0 = DMA Tx disabled
[7] DMA Rx enable (DRxEN)
0 = DMA Rx disabled
[8] DPLL enable (DPLLEN)
0 = Disable
1 = Enable; DPLL enters search mode for a locking edge in the incoming data stream.
[9] BRG enable (BRGEN)
0 = BRG counter is inbibited.
1 = BRG counter is enabled.
[10] Tx 4 word burst mode (Tx4WD)
0 = 1-word mode selected.
[11] Rx 4 word burst mode (Rx4WD)
0 = 1-word mode selected.
[13:12] Rx widget algnment (RxWA)
00 = No invalid byte
01 = 1 invalid byte
10 = 2 invalid byte
11 = 3 invalid byte
[14] DMA Tx stop or skip (DTxSTSK)
0 = DMA Tx skips when DMA not owner bit is set.
1 = DMA Tx stops when DMA not owner bit is set.
[15] DMA Rx stop or skip (DRxSTSK)
0 = DMA Rx skips when DMA not owner bit is set.
1 = DMA Rx stops when DMA not owner bit is set.
[16] DMA Rx memory address decrement (DRxMADEC)
0 = Address is incremented.
[17] Tx flag idle (TxFLAG)
0 = Enter mark idle mode (a bit pattern of consecutive ones)
1 = Enter time fill mode (a bit pattern of consecutive opening (closing) flag, as in string
A
E
N
u
o
t
01111110 01111110......
R
N
O
C
R
C
x
O
T
N
C
R
C
x
R
D
C
O
N
S
x
I
24
D
R
T
x
T
23 22
Figure 8-14. HDLC Control Register (HCON)
M
R
B
T
x
P
A
B
T
T
x
21
A
B
T
x
T
E
X
T
20 19
O
R
E
C
H
x
O
O
P
T
x
L
1 = TxFIFOmand Tx block are reset.
1 = RxFIFO and Rx block are reset.
1 = DMA Tx block is reset.
1 = DMA Rx block is reset.
1 = Tx enabled
1 = Rx enabled
1 = DMA Tx enabled
1 = DMA Rx enabled
1 = 4-word mode selected.
1 = 4-word mode selected.
1 = Address is decremented.
18 17 16
A
G
T
S
F
L
x
G
A
T
x
F
L
M
D
R
A
D
C
E
x
15 14
D
R
S
S
K
x
T
D
K
T
x
S
T
S
13 12 11
W
R
A
x
W
R
D
x
4
10 9
W
D
T
x
4
G
B
R
E
N
D
N
8 7 6
P
L
L
E
D
R
E
N
x
D
E
N
T
x
R
E
N
5
x
E
N
4
T
x
HDLC CONTROLLERS
D
R
R
S
3
x
D
R
S
2
T
x
R
R
S
1
x
R
S
0
T
x
8-33