s3c4510b Samsung Semiconductor, Inc., s3c4510b Datasheet - Page 325

• Manufacturer Part Number: s3c4510b
• Description: 16/32-bit Risc Microcontroller
• Manufacturer: Samsung Semiconductor, Inc.

S3C4510B
31
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30 29 28 27 26 25
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[3:0] Rx remaining bytes (RxRB)
At 1-word boundary:
0000 = Valid data byte is 1
0001 = Valid data byte is 2
0010 = Valid data byte is 3
0011 = Valid data byte is 4
[4] Tx frame complete (TxFC)
0 = Normal operation
1 = Automatically set; if two conditions are met:
[5] Tx FIFO available (TxFA)
0 = Tx FIFO is not available.
1 = Tx FIFO is available. (that is, the data to be transmitted can now be
[6] Tx clear-to send (TxCTS)
0 = Level at the nCTS input pin is High.
1 = Level at the nCTS input pin is Low.
[7] Tx stored clear-to-send (TxSCTS)
0 = Normal operation
1 = A transition occured at the nCTS input. (This transition can be used to
[8] Tx underrun (TxU)
0 = Normal operation
1 = The transmitter ran out of data during transmission.
[9] Rx FIFO available (RxFA)
0 = Normal operation
1 = Data is available in the RxFIFO.
[10] Reserved
[11] Rx flag detected (RxFD)
0 = Normal operation
1 = This bit is set, when the last bit of the flag sequence is received.
[12] Rx data-carrier-detected (RxDCD)
0 = nDCD input pin is High
1 = nDCD input pin is Low
[13] Rx stored data-carrier-detected (RxSDCD)
0 = Normal operation
1 = When a transition of the nDCD input occurs, this bit is set.
[14] Rx frame valid (RxFV)
0 = Normal operation
1 = The last data byte if a frame is transgerred into the last location of RxFIFO.
[15] Rx idle (RxIDLE)
0 = Normal operation
1 = A minimum 15 consecutive 1s have been reveived.
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F
1) Tx FIFO is empty.
loaded into the Tx FIFO.)
trigger an interrupt.)
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24
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23 22
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Figure 8-16. HDLC Status Register
21
20 19
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18 17 16
At 4-word boundary:
0000 = Valid data byte is 1
.
.
1111 = Valid data byte is 16
2) An abort or a closing flag is transmitted.
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15 14
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13 12 11
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10 9
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8 7 6
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5
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HDLC CONTROLLERS
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2
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1
0
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