SAM3U1C Atmel Corporation, SAM3U1C Datasheet - Page 100

• Manufacturer Part Number: SAM3U1C
• Manufacturer: Atmel Corporation

Specifications of SAM3U1C

• Flash (kbytes): 64 Kbytes
• Pin Count: 100
• Max. Operating Frequency: 96 MHz
• Cpu: Cortex-M3
• # Of Touch Channels: 28
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 57
• Ext Interrupts: 57
• Usb Transceiver: 1
• Quadrature Decoder Channels: 1
• Usb Speed: Hi-Speed
• Usb Interface: Device
• Spi: 4
• Twi (i2c): 1
• Uart: 4
• Ssc: 1
• Sd / Emmc: 1
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 8
• Adc Resolution (bits): 12
• Adc Speed (ksps): 384
• Resistive Touch Screen: No
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 20
• Self Program Memory: YES
• External Bus Interface: 1
• Dram Memory: No
• Nand Interface: Yes
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.8/3.3
• Operating Voltage (vcc): 1.62 to 3.6
• Fpu: No
• Mpu / Mmu: Yes / No
• Timers: 3
• Output Compare Channels: 3
• Input Capture Channels: 3
• Pwm Channels: 4
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

13.10.7.3
The example below shows the use of a conditional instruction to find the absolute value of a number. R0 = ABS(R1).
13.10.7.4
The example below shows the use of conditional instructions to update the value of R4 if the signed values R0 is greater
than R1 and R2 is greater than R3.
13.10.8
13.10.8.1
To use an instruction width suffix, place it immediately after the instruction mnemonic and condition code, if any. The exam-
ple below shows instructions with the instruction width suffix.
100
MOVS
IT
RSBMI
CMP
ITT
CMPGT
MOVGT
BCS.W
ADDS.W R0, R0, R1 ; creates a 32-bit instruction even though the same
SAM3U Series
Instruction width selection
Absolute value
Compare and update value
Instruction width selection
label
R0, R1
MI
R0, R1, #0
R0, R1
GT
R2, R3
R4, R5
Table 13-16. Condition code suffixes (Continued)
There are many instructions that can generate either a 16-bit encoding or a 32-bit encoding
depending on the operands and destination register specified. For some of these instructions,
you can force a specific instruction size by using an instruction width suffix. The .W suffix forces
a 32-bit instruction encoding. The .N suffix forces a 16-bit instruction encoding.
If you specify an instruction width suffix and the assembler cannot generate an instruction
encoding of the requested width, it generates an error.
In some cases it might be necessary to specify the .W suffix, for example if the operand is the
label of an instruction or literal data, as in the case of branch instructions. This is because the
assembler might not automatically generate the right size encoding.
Suffix
VC
HI
LS
GE
LT
GT
LE
AL
; creates a 32-bit instruction even for a short branch
; operation can be done by a 16-bit instruction
; Compare R0 and R1, setting flags
; IT instruction for the two GT conditions
; If 'greater than', compare R2 and R3, setting flags
; If still 'greater than', do R4 = R5
Flags
V = 0
C = 1 and Z = 0
C = 0 or Z = 1
N = V
N ! = V
Z = 0 and N = V
Z = 1 and N ! = V
Can have any
value
; R0 = R1, setting flags
; IT instruction for the negative condition
; If negative, R0 = -R1
Meaning
No overflow
Higher, unsigned >
Lower or same, unsigned ≤
Greater than or equal, signed ≥
Less than, signed <
Greater than, signed >
Less than or equal, signed ≤
Always. This is the default when no suffix is
specified.
6430E–ATARM–29-Aug-11