SAM3U1C Atmel Corporation, SAM3U1C Datasheet - Page 144

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SAM3U1C

Manufacturer Part Number
SAM3U1C
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of SAM3U1C

Flash (kbytes)
64 Kbytes
Pin Count
100
Max. Operating Frequency
96 MHz
Cpu
Cortex-M3
# Of Touch Channels
28
Hardware Qtouch Acquisition
No
Max I/o Pins
57
Ext Interrupts
57
Usb Transceiver
1
Quadrature Decoder Channels
1
Usb Speed
Hi-Speed
Usb Interface
Device
Spi
4
Twi (i2c)
1
Uart
4
Ssc
1
Sd / Emmc
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
8
Adc Resolution (bits)
12
Adc Speed (ksps)
384
Resistive Touch Screen
No
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
20
Self Program Memory
YES
External Bus Interface
1
Dram Memory
No
Nand Interface
Yes
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8/3.3
Operating Voltage (vcc)
1.62 to 3.6
Fpu
No
Mpu / Mmu
Yes / No
Timers
3
Output Compare Channels
3
Input Capture Channels
3
Pwm Channels
4
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes
13.16.1
13.16.1.1
13.16.1.2
13.16.1.3
144
SAM3U Series
B, BL, BX, and BLX
Syntax
Operation
Restrictions
Branch instructions.
where:
B
BL
BX
BLX
cond
label
Rm
be 1, but the address to branch to is created by changing bit[0] to 0.
All these instructions cause a branch to label, or to the address indicated in Rm. In addition:
Bcond label is the only conditional instruction that can be either inside or outside an IT block. All
other branch instructions must be conditional inside an IT block, and must be unconditional out-
side the IT block, see
Table 13-24
Table 13-24. Branch ranges
You might have to use the .W suffix to get the maximum branch range. See
selection” on page
The restrictions are:
Instruction
B label
Bcond label
Bcond label
BL{cond} label
BX{cond} Rm
BLX{cond} Rm
• The BL and BLX instructions write the address of the next instruction to LR (the link register,
• The BX and BLX instructions cause a UsageFault exception if bit[0] of Rm is 0.
R14).
B{cond} label
BL{cond} label
BX{cond} Rm
BLX{cond} Rm
(outside IT block)
(inside IT block)
shows the ranges for the various branch instructions.
is branch (immediate).
is branch with link (immediate).
is branch indirect (register).
is branch indirect with link (register).
is an optional condition code, see
is a PC-relative expression. See
is a register that indicates an address to branch to. Bit[0] of the value in Rm must
100.
“IT” on page
Any value in register
Any value in register
Branch range
− 16 MB to +16 MB
− 1 MB to +1 MB
− 16 MB to +16 MB
− 16 MB to +16 MB
147.
“PC-relative expressions” on page
“Conditional execution” on page
6430E–ATARM–29-Aug-11
“Instruction width
98.
98.

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