SAM3U1C Atmel Corporation, SAM3U1C Datasheet - Page 292

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SAM3U1C

Manufacturer Part Number
SAM3U1C
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of SAM3U1C

Flash (kbytes)
64 Kbytes
Pin Count
100
Max. Operating Frequency
96 MHz
Cpu
Cortex-M3
# Of Touch Channels
28
Hardware Qtouch Acquisition
No
Max I/o Pins
57
Ext Interrupts
57
Usb Transceiver
1
Quadrature Decoder Channels
1
Usb Speed
Hi-Speed
Usb Interface
Device
Spi
4
Twi (i2c)
1
Uart
4
Ssc
1
Sd / Emmc
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
8
Adc Resolution (bits)
12
Adc Speed (ksps)
384
Resistive Touch Screen
No
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
20
Self Program Memory
YES
External Bus Interface
1
Dram Memory
No
Nand Interface
Yes
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8/3.3
Operating Voltage (vcc)
1.62 to 3.6
Fpu
No
Mpu / Mmu
Yes / No
Timers
3
Output Compare Channels
3
Input Capture Channels
3
Pwm Channels
4
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes
19.4.7.2
19.4.8
Figure 19-7. Wake Up Sources
292
292
WKUP15
WKUP0
WKUP1
FWUP
SAM3U Series
SAM3U Series
Wake Up Sources
Brownout Detector Reset
rtc_alarm
rtt_alarm
sm_int
Falling/Rising
Falling/Rising
Falling/Rising
WKUPT15
WKUPT0
WKUPT1
Detector
Detector
Detector
Detector
Falling
Edge
Edge
Edge
Edge
The brownout detector provides the bodcore_in signal to the SUPC which indicates that the volt-
age regulation is operating as programmed. If this signal is lost for longer than 1 slow clock
period while the voltage regulator is enabled, the Supply Controller can assert vddcore_nreset.
This feature is enabled by writing the bit, BODRSTEN (Brownout Detector Reset Enable) to 1 in
the Supply Controller Mode Register (SUPC_MR).
If BODRSTEN is set and the voltage regulation is lost (output voltage of the regulator too low),
the vddcore_nreset signal is asserted for a minimum of 1 slow clock cycle and then released if
bodcore_in has been reactivated. The BODRSTS bit is set in the Supply Controller Status Reg-
ister (SUPC_SR) so that the user can know the source of the last reset.
Until bodcore_in is deactivated, the vddcore_nreset signal remains active.
The wake up events allow the device to exit backup mode. When a wake up event is detected,
the Supply Controller performs a sequence which automatically reenables the core power
supply.
SMEN
RTCEN
RTTEN
WKUPEN15
WKUPEN0
WKUPEN1
FWUPEN
WKUPIS0
WKUPIS1
WKUPIS15
SLCK
SLCK
FWUPDBC
WKUPDBC
Debouncer
Debouncer
WKUPS
FWUP
6430E–ATARM–29-Aug-11
6430E–ATARM–29-Aug-11
Core
Supply
Restart

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