SAM3U1C Atmel Corporation, SAM3U1C Datasheet - Page 899

no-image

SAM3U1C

Manufacturer Part Number
SAM3U1C
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of SAM3U1C

Flash (kbytes)
64 Kbytes
Pin Count
100
Max. Operating Frequency
96 MHz
Cpu
Cortex-M3
# Of Touch Channels
28
Hardware Qtouch Acquisition
No
Max I/o Pins
57
Ext Interrupts
57
Usb Transceiver
1
Quadrature Decoder Channels
1
Usb Speed
Hi-Speed
Usb Interface
Device
Spi
4
Twi (i2c)
1
Uart
4
Ssc
1
Sd / Emmc
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
8
Adc Resolution (bits)
12
Adc Speed (ksps)
384
Resistive Touch Screen
No
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
20
Self Program Memory
YES
External Bus Interface
1
Dram Memory
No
Nand Interface
Yes
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8/3.3
Operating Voltage (vcc)
1.62 to 3.6
Fpu
No
Mpu / Mmu
Yes / No
Timers
3
Output Compare Channels
3
Input Capture Channels
3
Pwm Channels
4
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes
38.6.5.5
6430E–ATARM–29-Aug-11
6430E–ATARM–29-Aug-11
Changing the Comparison Value and the Comparison Configuration
It is possible to change the comparison values and the comparison configurations while the
channel 0 is enabled (see
To prevent unexpected comparison match, the user must use the
Update Register”
and PWM_CMPMUPDx) to change respectively the comparison values and the comparison
configurations while the channel 0 is still enabled. These registers hold the new values until the
end of the comparison update period (when CUPRCNT is equal to CUPR in
x Mode Register”
ues for the next period.
CAUTION: to be taken into account, the write of the register PWM_CMPVUPDx must be fol-
lowed by a write of the register PWM_CMPMUPDx.
Note:
Figure 38-18. Synchronized Update of Comparison Values and Configurations
If the update registers PWM_CMPVUPDx and PWM_CMPMUPDx are written several times
between two updates, only the last written value are taken into account.
End of channel0 PWM period and
end of Comparison Update Period and
and PWM_CMPMx written
End of channel0 PWM period and
end of Comparison Update Period
(PWM_CMPMx) and the end of the current PWM period, then update the val-
and the
Section 38.6.3 “PWM Comparison
“PWM Comparison x Mode Update Register”
PWM_CMPVUPDx Value
Comparison Value
for comparison x
PWM_CMPVx
User's Writing
Units”).
PWM_CMPMUPDx Value
Comparison configuration
“PWM Comparison x Value
for comparison x
SAM3U Series
SAM3U Series
User's Writing
PWM_CMPMx
(PWM_CMPVUPDx
“PWM Comparison
899
899

Related parts for SAM3U1C