SAM3U1C Atmel Corporation, SAM3U1C Datasheet - Page 660

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SAM3U1C

Manufacturer Part Number
SAM3U1C
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of SAM3U1C

Flash (kbytes)
64 Kbytes
Pin Count
100
Max. Operating Frequency
96 MHz
Cpu
Cortex-M3
# Of Touch Channels
28
Hardware Qtouch Acquisition
No
Max I/o Pins
57
Ext Interrupts
57
Usb Transceiver
1
Quadrature Decoder Channels
1
Usb Speed
Hi-Speed
Usb Interface
Device
Spi
4
Twi (i2c)
1
Uart
4
Ssc
1
Sd / Emmc
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
8
Adc Resolution (bits)
12
Adc Speed (ksps)
384
Resistive Touch Screen
No
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
20
Self Program Memory
YES
External Bus Interface
1
Dram Memory
No
Nand Interface
Yes
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8/3.3
Operating Voltage (vcc)
1.62 to 3.6
Fpu
No
Mpu / Mmu
Yes / No
Timers
3
Output Compare Channels
3
Input Capture Channels
3
Pwm Channels
4
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes
33.11.5
Name:
Address:
Access:
Reset:
TWI_CWGR is only used in Master mode.
• CLDIV: Clock Low Divider
The SCL low period is defined as follows:
• CHDIV: Clock High Divider
The SCL high period is defined as follows:
• CKDIV: Clock Divider
The CKDIV is used to increase both SCL high and low periods.
660
660
T
T
low
high
=
=
31
23
15
7
(
(
(
(
CLDIV
CHDIV
SAM3U Series
SAM3U Series
TWI Clock Waveform Generator Register
TWI_CWGR
0x40084010 (0), 0x40088010 (1)
Read-write
0x00000000
×
×
2
2
CKDIV
CKDIV
30
22
14
6
)
)
+
+
4 )
4 )
×
×
T
T
MCK
MCK
29
21
13
5
28
20
12
4
CHDIV
CLDIV
27
19
11
3
26
18
10
2
CKDIV
25
17
9
1
6430E–ATARM–29-Aug-11
6430E–ATARM–29-Aug-11
24
16
8
0

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