SAM3U1C Atmel Corporation, SAM3U1C Datasheet - Page 307

• Manufacturer Part Number: SAM3U1C
• Manufacturer: Atmel Corporation

Specifications of SAM3U1C

• Flash (kbytes): 64 Kbytes
• Pin Count: 100
• Max. Operating Frequency: 96 MHz
• Cpu: Cortex-M3
• # Of Touch Channels: 28
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 57
• Ext Interrupts: 57
• Usb Transceiver: 1
• Quadrature Decoder Channels: 1
• Usb Speed: Hi-Speed
• Usb Interface: Device
• Spi: 4
• Twi (i2c): 1
• Uart: 4
• Ssc: 1
• Sd / Emmc: 1
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 8
• Adc Resolution (bits): 12
• Adc Speed (ksps): 384
• Resistive Touch Screen: No
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 20
• Self Program Memory: YES
• External Bus Interface: 1
• Dram Memory: No
• Nand Interface: Yes
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.8/3.3
• Operating Voltage (vcc): 1.62 to 3.6
• Fpu: No
• Mpu / Mmu: Yes / No
• Timers: 3
• Output Compare Channels: 3
• Input Capture Channels: 3
• Pwm Channels: 4
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

21. Enhanced Embedded Flash Controller (EEFC)
21.1
21.2
21.3
21.3.1
21.3.2
21.4
21.4.1
6430E–ATARM–29-Aug-11
6430E–ATARM–29-Aug-11
Description
Embedded Characteristics
Product Dependencies
Functional Description
Power Management
Interrupt Sources
Embedded Flash Organization
The Enhanced Embedded Flash Controller (EEFC) ensures the interface of the Flash block with
the 32-bit internal bus.
Its 128-bit or 64-bit wide memory interface increases performance. It also manages the pro-
gramming, erasing, locking and unlocking sequences of the Flash using a full set of commands.
One of the commands returns the embedded Flash descriptor definition that informs the system
about the Flash organization, thus making the software generic.
The Enhanced Embedded Flash Controller (EEFC) is continuously clocked. The Power Man-
agement Controller has no effect on its behavior.
The Enhanced Embedded Flash Controller (EEFC) interrupt line is connected to the Nested
Vectored Interrupt Controller (NVIC). Using the Enhanced Embedded Flash Controller (EEFC)
interrupt requires the NVIC to be programmed first. The EEFC interrupt is generated only on
FRDY bit rising.
The embedded Flash interfaces directly with the 32-bit internal bus. The embedded Flash is
composed of:
• Interface of the Flash Block with the 32-bit Internal Bus
• Increases Performance in Thumb2 Mode with 128-bit or -64 bit Wide Memory Interface up to
• 32 Lock Bits, Each Protecting a Lock Region
• GPNVMx General-purpose GPNVM Bits
• One-by-one Lock Bit Programming
• Commands Protected by a Keyword
• Erases the Entire Flash
• Erases by Plane
• Possibility of Erasing before Programming
• Locking and Unlocking Operations
• Consecutive Programming and Locking Operations
• One memory plane organized in several pages of the same size.
• Two 128-bit or 64-bit read buffers used for code read optimization.
• One 128-bit or 64-bit read buffer used for data read optimization.
24 MHz
SAM3U Series
SAM3U Series
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