SAM3U1C Atmel Corporation, SAM3U1C Datasheet - Page 220

• Manufacturer Part Number: SAM3U1C
• Manufacturer: Atmel Corporation

Specifications of SAM3U1C

• Flash (kbytes): 64 Kbytes
• Pin Count: 100
• Max. Operating Frequency: 96 MHz
• Cpu: Cortex-M3
• # Of Touch Channels: 28
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 57
• Ext Interrupts: 57
• Usb Transceiver: 1
• Quadrature Decoder Channels: 1
• Usb Speed: Hi-Speed
• Usb Interface: Device
• Spi: 4
• Twi (i2c): 1
• Uart: 4
• Ssc: 1
• Sd / Emmc: 1
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 8
• Adc Resolution (bits): 12
• Adc Speed (ksps): 384
• Resistive Touch Screen: No
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 20
• Self Program Memory: YES
• External Bus Interface: 1
• Dram Memory: No
• Nand Interface: Yes
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.8/3.3
• Operating Voltage (vcc): 1.62 to 3.6
• Fpu: No
• Mpu / Mmu: Yes / No
• Timers: 3
• Output Compare Channels: 3
• Input Capture Channels: 3
• Pwm Channels: 4
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

13.22.7
13.22.8
13.22.8.1
220
SAM3U Series
MPU mismatch
Updating an MPU region
Updating an MPU region using separate words
Table 13-39. AP encoding (Continued)
When an access violates the MPU permissions, the processor generates a memory manage-
ment fault, see
fault. See
To update the attributes for an MPU region, update the RNR, RBAR and RASR registers. You
can program each register separately, or use a multiple-word write to program all of these regis-
ters. You can use the RBAR and RASR aliases to program up to four regions simultaneously
using an STM instruction.
Simple code to configure one region:
Disable a region before writing new region settings to the MPU if you have previously enabled
the region being changed. For example:
Software must use memory barrier instructions:
AP[2:0]
101
110
111
; R1 = region number
; R2 = size/enable
; R3 = attributes
; R4 = address
LDR R0,=MPU_RNR
STR R1, [R0, #0x0]
STR R4, [R0, #0x4]
STRH R2, [R0, #0x8]
STRH R3, [R0, #0xA]
; R1 = region number
; R2 = size/enable
; R3 = attributes
; R4 = address
LDR R0,=MPU_RNR
STR R1, [R0, #0x0]
BIC R2, R2, #1
STRH R2, [R0, #0x8]
STR R4, [R0, #0x4]
STRH R3, [R0, #0xA]
ORR R2, #1
STRH R2, [R0, #0x8]
“Memory Management Fault Status Register” on page 196
Privileged
permissions
RO
RO
RO
“Exceptions and interrupts” on page
Unprivileged
permissions
No access
RO
RO
; 0xE000ED98, MPU region number register
; Region Number
; Region Base Address
; Region Size and Enable
; Region Attribute
; 0xE000ED98, MPU region number register
; Region Number
; Disable
; Region Size and Enable
; Region Base Address
; Region Attribute
; Enable
; Region Size and Enable
Description
Reads by privileged software only
Read only, by privileged or unprivileged software
Read only, by privileged or unprivileged software
66. The MMFSR indicates the cause of the
for more information.
6430E–ATARM–29-Aug-11