SAM3U1C Atmel Corporation, SAM3U1C Datasheet - Page 1060

• Manufacturer Part Number: SAM3U1C
• Manufacturer: Atmel Corporation

Specifications of SAM3U1C

• Flash (kbytes): 64 Kbytes
• Pin Count: 100
• Max. Operating Frequency: 96 MHz
• Cpu: Cortex-M3
• # Of Touch Channels: 28
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 57
• Ext Interrupts: 57
• Usb Transceiver: 1
• Quadrature Decoder Channels: 1
• Usb Speed: Hi-Speed
• Usb Interface: Device
• Spi: 4
• Twi (i2c): 1
• Uart: 4
• Ssc: 1
• Sd / Emmc: 1
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 8
• Adc Resolution (bits): 12
• Adc Speed (ksps): 384
• Resistive Touch Screen: No
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 20
• Self Program Memory: YES
• External Bus Interface: 1
• Dram Memory: No
• Nand Interface: Yes
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.8/3.3
• Operating Voltage (vcc): 1.62 to 3.6
• Fpu: No
• Mpu / Mmu: Yes / No
• Timers: 3
• Output Compare Channels: 3
• Input Capture Channels: 3
• Pwm Channels: 4
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

40.5.18
Name:
Addresses: 0x400B0050 [0], 0x400B0078 [1], 0x400B00A0 [2], 0x400B00C8 [3]
Access:
Reset:
• SRC_PER
Channel x Source Request is associated with peripheral identifier coded SRC_PER handshaking interface.
• DST_PER
Channel x Destination Request is associated with peripheral identifier coded DST_PER handshaking interface.
• SRC_H2SEL
0: Software handshaking interface is used to trigger a transfer request.
1: Hardware handshaking interface is used to trigger a transfer request.
• DST_H2SEL
0: Software handshaking interface is used to trigger a transfer request.
1: Hardware handshaking interface is used to trigger a transfer request.
• SOD
0: STOP ON DONE disabled, the descriptor fetch operation ignores DONE Field of CTRLA register.
1: STOP ON DONE activated, the DMAC module is automatically disabled if DONE FIELD is set to 1.
• LOCK_IF
0: Interface Lock capability is disabled
1: Interface Lock capability is enabled
• LOCK_B
0: AHB Bus Locking capability is disabled.
1: AHB Bus Locking capability is enabled.
• LOCK_IF_L
0: The Master Interface Arbiter is locked by the channel x for a chunk transfer.
1060
31
23
15
–
–
–
7
SAM3U Series
DMAC Channel x [x = 0..3] Configuration Register
DMAC_CFGx [x = 0..3]
Read-write
0x0100000000
LOCK_IF_L
30
22
14
–
–
6
DST_PER
DST_H2SEL
LOCK_B
29
21
13
5
FIFOCFG
LOCK_IF
28
20
12
–
4
27
19
11
–
–
–
3
26
18
10
–
–
2
SRC_PER
SRC_H2SEL
AHB_PROT
25
17
–
9
1
6430E–ATARM–29-Aug-11
SOD
24
16
8
–
0