SAM3U1C Atmel Corporation, SAM3U1C Datasheet - Page 371

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SAM3U1C

Manufacturer Part Number
SAM3U1C
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of SAM3U1C

Flash (kbytes)
64 Kbytes
Pin Count
100
Max. Operating Frequency
96 MHz
Cpu
Cortex-M3
# Of Touch Channels
28
Hardware Qtouch Acquisition
No
Max I/o Pins
57
Ext Interrupts
57
Usb Transceiver
1
Quadrature Decoder Channels
1
Usb Speed
Hi-Speed
Usb Interface
Device
Spi
4
Twi (i2c)
1
Uart
4
Ssc
1
Sd / Emmc
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
8
Adc Resolution (bits)
12
Adc Speed (ksps)
384
Resistive Touch Screen
No
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
20
Self Program Memory
YES
External Bus Interface
1
Dram Memory
No
Nand Interface
Yes
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8/3.3
Operating Voltage (vcc)
1.62 to 3.6
Fpu
No
Mpu / Mmu
Yes / No
Timers
3
Output Compare Channels
3
Input Capture Channels
3
Pwm Channels
4
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes
25.13.1
Figure 25-17. TDF Period in NRD Controlled Read Access (TDF = 2)
6430E–ATARM–29-Aug-11
6430E–ATARM–29-Aug-11
READ_MODE
NBS0, NBS1,
Setting READ_MODE to 1 indicates to the SMC that the NRD signal is responsible for turning off
the tri-state buffers of the external memory device. The Data Float Period then begins after the
rising edge of the NRD signal and lasts TDF_CYCLES MCK cycles.
When the read operation is controlled by the NCS signal (READ_MODE = 0), the TDF field gives
the number of MCK cycles during which the data bus remains busy after the rising edge of NCS.
Figure 25-17
assuming a data float period of 2 cycles (TDF_CYCLES = 2).
ation when controlled by NCS (READ_MODE = 0) and the TDF_CYCLES parameter equals 3.
D[15:0]
A[23:2]
A0, A1
MCK
NRD
NCS
illustrates the Data Float Period in NRD-controlled mode (READ_MODE =1),
NRD controlled read operation
tpacc
TDF = 2 clock cycles
Figure 25-18
SAM3U Series
SAM3U Series
shows the read oper-
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