SAM3U1C Atmel Corporation, SAM3U1C Datasheet - Page 901

• Manufacturer Part Number: SAM3U1C
• Manufacturer: Atmel Corporation

Specifications of SAM3U1C

• Flash (kbytes): 64 Kbytes
• Pin Count: 100
• Max. Operating Frequency: 96 MHz
• Cpu: Cortex-M3
• # Of Touch Channels: 28
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 57
• Ext Interrupts: 57
• Usb Transceiver: 1
• Quadrature Decoder Channels: 1
• Usb Speed: Hi-Speed
• Usb Interface: Device
• Spi: 4
• Twi (i2c): 1
• Uart: 4
• Ssc: 1
• Sd / Emmc: 1
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 8
• Adc Resolution (bits): 12
• Adc Speed (ksps): 384
• Resistive Touch Screen: No
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 20
• Self Program Memory: YES
• External Bus Interface: 1
• Dram Memory: No
• Nand Interface: Yes
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.8/3.3
• Operating Voltage (vcc): 1.62 to 3.6
• Fpu: No
• Mpu / Mmu: Yes / No
• Timers: 3
• Output Compare Channels: 3
• Input Capture Channels: 3
• Pwm Channels: 4
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

6430E–ATARM–29-Aug-11
6430E–ATARM–29-Aug-11
Both types of Write Protect can be applied independently to a particular register group by means
of the WPCMD and WPRG fields in PWM_WPCR register. If at least one Write Protect is active,
the register group is write-protected. The field WPCMD allows to perform the following actions
depending on its value:
At any time, the user can determine which Write Protect is active in which register group by the
fields WPSWS and WPHWS in the
(PWM_WPSR).
If a write access in a write-protected register is detected, then the WPVS flag in the
PWM_WPSR register is set and the field WPVSRC indicates in which register the write access
has been attempted, through its address offset without the two LSBs.
The WPVS and PWM_WPSR fields are automatically reset after reading the PWM_WPSR
register.
• 0 = Disabling the Write Protect SW of the register groups of which the bit WPRG is at 1.
• 1 = Enabling the Write Protect SW of the register groups of which the bit WPRG is at 1.
• 2 = Enabling the Write Protect HW of the register groups of which the bit WPRG is at 1.
“PWM Write Protect Status Register” on page 936
SAM3U Series
SAM3U Series
901
901