MC9S12HZ128VAL Freescale Semiconductor, MC9S12HZ128VAL Datasheet - Page 141

• Manufacturer Part Number: MC9S12HZ128VAL
• Description: IC MCU 16BIT 2K FLASH 112-LQFP
• Manufacturer: Freescale Semiconductor
• Series: HCS12r

Specifications of MC9S12HZ128VAL

• Core Processor: HCS12
• Core Size: 16-Bit
• Speed: 25MHz
• Connectivity: CAN, EBI/EMI, I²C, SCI, SPI
• Peripherals: LCD, Motor control PWM, POR, PWM, WDT
• Number Of I /o: 85
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 2K x 8
• Ram Size: 6K x 8
• Voltage - Supply (vcc/vdd): 2.35 V ~ 5.5 V
• Data Converters: A/D 16x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 105°C
• Package / Case: 112-LQFP
• Processor Series: S12H
• Core: HCS12
• Data Bus Width: 16 bit
• Data Ram Size: 6 KB
• Interface Type: I2C/SCI/SPI
• Maximum Clock Frequency: 50 MHz
• Number Of Programmable I/os: 85
• Number Of Timers: 8
• Maximum Operating Temperature: + 105 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWHCS12
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 16-ch x 10-bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

4.3.4.5
Read: Anytime. Write: Anytime.
This register configures whether a pull-up or a pull-down device is activated on configured input pins. If
a pin is configured as output, the corresponding Pull Device Enable Register bit has no effect.
4.3.4.6
Read: Anytime. Write: Anytime.
The Port P Polarity Select Register selects whether a pull-down or a pull-up device is connected to the pin.
The Port P Polarity Select Register is effective only when the corresponding Data Direction Register bit
is set to 0 (input) and the corresponding Pull Device Enable Register bit is set to 1.
Freescale Semiconductor
PERP[5:0]
PPSP[5:0]
Reset
Reset
Field
Field
5:0
5:0
W
W
R
R
Pull Device Enable Port P
0 Pull-up or pull-down device is disabled.
1 Pull-up or pull-down device is enabled.
Polarity Select Port P
0 A pull-up device is connected to the associated port P pin.
1 A pull-down device is connected to the associated port P pin.
Port P Pull Device Enable Register (PERP)
Port P Polarity Select Register (PPSP)
0
0
0
0
7
7
= Reserved or Unimplemented
= Reserved or Unimplemented
Figure 4-27. Port P Pull Device Enable Register (PERP)
0
0
0
0
6
6
Figure 4-28. Port P Polarity Select Register (PPSP)
Table 4-20. PERP Field Descriptions
Table 4-21. PPSP Field Descriptions
PERP5
PPSP5
MC9S12HZ256 Data Sheet, Rev. 2.05
0
0
5
5
PERP4
PPSP4
0
0
4
4
Description
Description
PERP3
PPSP3
0
0
3
3
Chapter 4 Port Integration Module (PIM9HZ256V2)
PERP2
PPSP2
0
0
2
2
PERP1
PPSP1
0
0
1
1
PERP0
PPSP0
0
0
0
0
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