MC9S12HZ128VAL Freescale Semiconductor, MC9S12HZ128VAL Datasheet - Page 553

IC MCU 16BIT 2K FLASH 112-LQFP

MC9S12HZ128VAL

Manufacturer Part Number
MC9S12HZ128VAL
Description
IC MCU 16BIT 2K FLASH 112-LQFP
Manufacturer
Freescale Semiconductor
Series
HCS12r
Datasheet

Specifications of MC9S12HZ128VAL

Core Processor
HCS12
Core Size
16-Bit
Speed
25MHz
Connectivity
CAN, EBI/EMI, I²C, SCI, SPI
Peripherals
LCD, Motor control PWM, POR, PWM, WDT
Number Of I /o
85
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Eeprom Size
2K x 8
Ram Size
6K x 8
Voltage - Supply (vcc/vdd)
2.35 V ~ 5.5 V
Data Converters
A/D 16x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 105°C
Package / Case
112-LQFP
Processor Series
S12H
Core
HCS12
Data Bus Width
16 bit
Data Ram Size
6 KB
Interface Type
I2C/SCI/SPI
Maximum Clock Frequency
50 MHz
Number Of Programmable I/os
85
Number Of Timers
8
Maximum Operating Temperature
+ 105 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWHCS12
Minimum Operating Temperature
- 40 C
On-chip Adc
16-ch x 10-bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

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Quantity
Price
Part Number:
MC9S12HZ128VAL
Manufacturer:
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Quantity:
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Part Number:
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Manufacturer:
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Quantity:
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19.3.2.9
1
2
Freescale Semiconductor
DBG
BKP
EXTCMP
See
See
comparators A and B in DBG mode only).
PAGSEL
Reset
Field
7:6
5:0
1
2
Figure
Figure 19-10
W
R
Not FLASH/ROM access
19-16.
Page Selector Field — If DBGEN is set in DBGC1, then PAGSEL selects the type of paging as shown in
Table
DPAGE and EPAGE are not yet implemented so the value in bit 7 will be ignored (i.e., PAGSEL values of 10 and
11 will be interpreted as values of 00 and 01, respectively).
In BKP mode, PAGSEL has no meaning and EXTCMP[5:0] are compared to address bits [19:14] if the address
is in the FLASH/ROM memory space.
Comparator A Extended Compare Bits — The EXTCMP bits are used as comparison address bits as shown
in
FLASH/ROM access
Debug Comparator A Extended Register (DBGCAX)
NOTES:
1. In BKP mode, PAGSEL has no functionality. Therefore, set PAGSEL to 00 (reset state).
2. Current HCS12 implementations are limited to six PPAGE bits, PIX[5:0].
0
7
Table 19-20
Mode
PORTK/XAB
PAGSEL = 00
PAGSEL = 01
PAGSEL
(note that while this figure provides extended comparisons for comparator C, the figure also pertains to
Figure 19-16. Comparators A and B Extended Comparison in BKP Mode
19-20.
DBGCXX
PPAGE
Figure 19-15. Debug Comparator A Extended Register (DBGCAX)
along with the appropriate PPAGE, DPAGE, or EPAGE signal from the core.
0
6
XAB21
PIX7
SEE NOTE 1
SEE NOTE 2
0
PAGSEL
Table 19-20. Comparator A or B Compares
Table 19-19. DBGCAX Field Descriptions
XAB20
PIX6
MC9S12HZ256 Data Sheet, Rev. 2.05
0
0
5
EXTCMP[5:0] = XAB[19:14]
EXTCMP[5:0] = XAB[21:16]
EXTCMP Compare
XAB19
PIX5
5
No compare
No compare
0
4
XAB18
PIX4
4
Description
XAB17
PIX3
3
EXTCMP
0
3
EXTCMP
XAB16
PIX2
2
DBGCxH[7:0] = XAB[15:14], AB[13:8]
XAB15
0
2
PIX1
DBGCxH[7:0] = AB[15:8]
DBGCxH[5:0] = AB[13:8]
DBGCxH[7:0] = AB[15:8]
1
High-Byte Compare
Chapter 19 Debug Module (DBGV1)
XAB14
BIT 0
PIX0
0
1
0
0
553

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