MC9S12HZ128VAL Freescale Semiconductor, MC9S12HZ128VAL Datasheet - Page 21

• Manufacturer Part Number: MC9S12HZ128VAL
• Description: IC MCU 16BIT 2K FLASH 112-LQFP
• Manufacturer: Freescale Semiconductor
• Series: HCS12r

Specifications of MC9S12HZ128VAL

• Core Processor: HCS12
• Core Size: 16-Bit
• Speed: 25MHz
• Connectivity: CAN, EBI/EMI, I²C, SCI, SPI
• Peripherals: LCD, Motor control PWM, POR, PWM, WDT
• Number Of I /o: 85
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 2K x 8
• Ram Size: 6K x 8
• Voltage - Supply (vcc/vdd): 2.35 V ~ 5.5 V
• Data Converters: A/D 16x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 105°C
• Package / Case: 112-LQFP
• Processor Series: S12H
• Core: HCS12
• Data Bus Width: 16 bit
• Data Ram Size: 6 KB
• Interface Type: I2C/SCI/SPI
• Maximum Clock Frequency: 50 MHz
• Number Of Programmable I/os: 85
• Number Of Timers: 8
• Maximum Operating Temperature: + 105 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWHCS12
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 16-ch x 10-bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Chapter 1
MC9S12HZ256 Device Overview
1.1
The MC9S12HZ256 microcontroller units (MCU) are 16-bit devices composed of standard on-chip
peripherals including a 16-bit central processing unit (HCS12 CPU), up to 256K bytes of Flash EEPROM
or ROM, up to 12K bytes of RAM, 2K bytes of EEPROM, two asynchronous serial communications
interfaces (SCI), a serial peripheral interface (SPI), an IIC-bus interface (IIC), an 8-channel 16-bit timer
(TIM), a 16-channel, 10-bit analog-to-digital converter (ATD), a six-channel pulse width modulator
(PWM), and two CAN 2.0 A, B software compatible modules (MSCAN). In addition, they feature a 32x4
liquid crystal display (LCD) controller/driver, a pulse width modulator motor controller (MC) consisting
of 16 high current outputs suited to drive up to four stepper motors, and four stepper stall detectors (SSD)
to simultaneously calibrate the pointer position of each motor. System resource mapping, clock generation,
interrupt control, and external bus interfacing are managed by the HCS12 Core. The MC9S12HZ256 have
full 16-bit data paths throughout. The inclusion of a PLL circuit allows power consumption and
performance to be adjusted to suit operational requirements. In addition to the I/O ports available in each
module, 8 general-purpose I/O pins are available with interrupt and wake-up capability from stop or wait
mode.
For information regarding the HCS12 CPU instruction set, please see the HCS12 CPU Reference Manual,
Freescale document order number S12CPUV2.
1.1.1
Freescale Semiconductor
•
HCS12 core
– 16-bit HCS12 CPU
– MEBI (multiplexed external bus interface)
– MMC (module mapping control)
– INT (interrupt control)
– DBG (debugger and breakpoints)
– BDM (background debug mode)
Introduction
Features
Upward compatible with M68HC11 instruction set
Interrupt stacking and programmer’s model identical to M68HC11
16-bit ALU
Instruction queue
Enhanced indexed addressing
MC9S12HZ256 Data Sheet, Rev. 2.05
21