MC9S12HZ128VAL Freescale Semiconductor, MC9S12HZ128VAL Datasheet - Page 301

• Manufacturer Part Number: MC9S12HZ128VAL
• Description: IC MCU 16BIT 2K FLASH 112-LQFP
• Manufacturer: Freescale Semiconductor
• Series: HCS12r

Specifications of MC9S12HZ128VAL

• Core Processor: HCS12
• Core Size: 16-Bit
• Speed: 25MHz
• Connectivity: CAN, EBI/EMI, I²C, SCI, SPI
• Peripherals: LCD, Motor control PWM, POR, PWM, WDT
• Number Of I /o: 85
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 2K x 8
• Ram Size: 6K x 8
• Voltage - Supply (vcc/vdd): 2.35 V ~ 5.5 V
• Data Converters: A/D 16x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 105°C
• Package / Case: 112-LQFP
• Processor Series: S12H
• Core: HCS12
• Data Bus Width: 16 bit
• Data Ram Size: 6 KB
• Interface Type: I2C/SCI/SPI
• Maximum Clock Frequency: 50 MHz
• Number Of Programmable I/os: 85
• Number Of Timers: 8
• Maximum Operating Temperature: + 105 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWHCS12
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 16-ch x 10-bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

10.3.2.6
Read: anytime.
Write: Never.
This 16-bit field is signed and is represented in two’s complement. It indicates the change in flux while
integrating the back EMF present in the non-driven coil during a return to zero event.
When ITG is zero, the accumulator is initialized to 0x0000 and the sigma-delta converter is in a reset state.
When ITG is one, the accumulator increments or decrements depending on the sigma-delta conversion
sample. The accumulator sample frequency is determined by the ACLKS field. The accumulator freezes
at 0x7FFF on a positive overflow and freezes at 0x8000 on a negative overflow.
10.4
The stepper stall detector (SSD) has a simple control block to configure the H-bridge drivers of a stepper
motor in four different full step states with four available modes during a return to zero event. The SSD
has a detect circuit using a sigma-delta converter to measure and integrate changes in flux of the
de-energized winding in the stepping motor and the conversion result is accumulated in a 16-bit signed
register. The SSD also has a 16-bit modulus down counter to monitor blanking and integration times. DC
offset compensation is implemented when using the modulus down counter to monitor integration times.
10.4.1
There are four return to zero modes as shown in
Freescale Semiconductor
Reset
Reset
W
W
R
R
Functional Description
Return to Zero Modes
Integration Accumulator Register (ITGACC)
15
0
0
7
A separate read for high byte and low byte gives a different result than
accessing the register as a word.
Figure 10-8. Integration Accumulator Register High (ITGACC)
Figure 10-9. Integration Accumulator Register Low (ITGACC)
14
0
0
6
ITG
Table 10-11. Return to Zero Modes
MC9S12HZ256 Data Sheet, Rev. 2.05
13
0
0
5
DCOIL
Table
NOTE
12
0
0
4
ITGACC
ITGACC
10-11.
Mode
11
0
0
3
Chapter 10 Stepper Stall Detector (SSDV1)
10
0
0
2
0
0
9
1
0
0
8
0
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