MC9S12HZ128VAL Freescale Semiconductor, MC9S12HZ128VAL Datasheet - Page 547

• Manufacturer Part Number: MC9S12HZ128VAL
• Description: IC MCU 16BIT 2K FLASH 112-LQFP
• Manufacturer: Freescale Semiconductor
• Series: HCS12r

Specifications of MC9S12HZ128VAL

• Core Processor: HCS12
• Core Size: 16-Bit
• Speed: 25MHz
• Connectivity: CAN, EBI/EMI, I²C, SCI, SPI
• Peripherals: LCD, Motor control PWM, POR, PWM, WDT
• Number Of I /o: 85
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 2K x 8
• Ram Size: 6K x 8
• Voltage - Supply (vcc/vdd): 2.35 V ~ 5.5 V
• Data Converters: A/D 16x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 105°C
• Package / Case: 112-LQFP
• Processor Series: S12H
• Core: HCS12
• Data Bus Width: 16 bit
• Data Ram Size: 6 KB
• Interface Type: I2C/SCI/SPI
• Maximum Clock Frequency: 50 MHz
• Number Of Programmable I/os: 85
• Number Of Timers: 8
• Maximum Operating Temperature: + 105 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWHCS12
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 16-ch x 10-bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

19.3.2.5
1
2
3
Freescale Semiconductor
EXTCMP
See
Current HCS12 implementations have PPAGE limited to 6 bits. Therefore, EXTCMP[5:4] should be set to 00.
Data page (DPAGE) and Extra page (EPAGE) are reserved for implementation on devices that support paged data and extra
space.
PAGSEL
PAGSEL
Reset
Field
10
11
7:6
5:0
00
01
Figure
W
R
3
2
19-10.
Page Selector Field — In both BKP and DBG mode, PAGSEL selects the type of paging as shown in
Table
DPAGE and EPAGE are not yet implemented so the value in bit 7 will be ignored (i.e., PAGSEL values of 10 and
11 will be interpreted as values of 00 and 01, respectively).
Comparator C Extended Compare Bits — The EXTCMP bits are used as comparison address bits as shown
in
Note: Comparator C can be used when the DBG module is configured for BKP mode. Extended addressing
Debug Comparator C Extended Register (DBGCCX)
0
7
Table 19-11
PAGSEL
19-11.
comparisons for comparator C use PAGSEL and will operate differently to the way that comparator A and
B operate in BKP mode.
(256 — 16K pages)
DPAGE (reserved)
(256 — 4K pages)
EPAGE (reserved)
(256 — 1K pages)
Normal (64k)
Figure 19-9. Debug Comparator C Extended Register (DBGCCX)
Description
PPAGE
along with the appropriate PPAGE, DPAGE, or EPAGE signal from the core.
0
6
Table 19-10. DBGCCX Field Descriptions
MC9S12HZ256 Data Sheet, Rev. 2.05
Table 19-11. PAGSEL Decoding
0
5
EXTCMP[5:0] is compared to
EXTCMP[3:0] is compared to
EXTCMP[1:0] is compared to
address bits [21:16]
address bits [19:16]
address bits [17:16]
0
4
EXTCMP
Not used
Description
2
0
3
EXTCMP
1
DPAGE / XAB[21:14] becomes address
EPAGE / XAB[21:14] becomes address
PPAGE[7:0] / XAB[21:14] becomes
0
2
Chapter 19 Debug Module (DBGV1)
address bits [21:14]
No paged memory
bits [19:12]
bits [17:10]
Comment
0
1
1
0
0
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