MC9S12HZ128VAL Freescale Semiconductor, MC9S12HZ128VAL Datasheet - Page 367

• Manufacturer Part Number: MC9S12HZ128VAL
• Description: IC MCU 16BIT 2K FLASH 112-LQFP
• Manufacturer: Freescale Semiconductor
• Series: HCS12r

Specifications of MC9S12HZ128VAL

• Core Processor: HCS12
• Core Size: 16-Bit
• Speed: 25MHz
• Connectivity: CAN, EBI/EMI, I²C, SCI, SPI
• Peripherals: LCD, Motor control PWM, POR, PWM, WDT
• Number Of I /o: 85
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 2K x 8
• Ram Size: 6K x 8
• Voltage - Supply (vcc/vdd): 2.35 V ~ 5.5 V
• Data Converters: A/D 16x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 105°C
• Package / Case: 112-LQFP
• Processor Series: S12H
• Core: HCS12
• Data Bus Width: 16 bit
• Data Ram Size: 6 KB
• Interface Type: I2C/SCI/SPI
• Maximum Clock Frequency: 50 MHz
• Number Of Programmable I/os: 85
• Number Of Timers: 8
• Maximum Operating Temperature: + 105 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWHCS12
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 16-ch x 10-bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Section 12.3.2.1, “MSCAN Control Register 0
point for the recessive bit of the ACK delimiter in the CAN frame. In case of a transmission, the CPU can
only read the time stamp after the respective transmit buffer has been flagged empty.
The timer value, which is used for stamping, is taken from a free running internal CAN bit clock. A timer
overrun is not indicated by the MSCAN. The timer is reset (all bits set to 0) during initialization mode. The
CPU can only read the time stamp registers.
Read: Anytime when TXEx flag is set (see
(CANTFLG)”) and the corresponding transmit buffer is selected in CANTBSEL (see
“MSCAN Transmit Buffer Selection Register
Write: Unimplemented
12.4
12.4.1
This section provides a complete functional description of the MSCAN. It describes each of the features
and modes listed in the introduction.
Freescale Semiconductor
Reset:
Reset:
W
W
Functional Description
R
R
General
TSR15
TSR7
7
x
7
x
Figure 12-34. Time Stamp Register — High Byte (TSRH)
Figure 12-35. Time Stamp Register — Low Byte (TSRL)
TSR14
TSR6
6
x
6
x
MC9S12HZ256 Data Sheet, Rev. 2.05
TSR13
TSR5
5
x
5
x
Section 12.3.2.7, “MSCAN Transmitter Flag Register
(CANTBSEL)”).
(CANCTL0)”). The time stamp is written on the bit sample
TSR12
TSR4
Chapter 12 Freescale’s Scalable Controller Area Network (MSCANV2)
4
x
4
x
TSR11
TSR3
x
x
3
3
TSR10
TSR2
2
x
2
x
TSR9
TSR1
Section 12.3.2.11,
x
x
1
1
TSR8
TSR0
0
x
0
x
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