DF2218BR24V Renesas Electronics America, DF2218BR24V Datasheet - Page 238

• Manufacturer Part Number: DF2218BR24V
• Description: IC H8S/2218 MCU FLASH 112-LFBGA
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2200r

Specifications of DF2218BR24V

• Core Processor: H8S/2000
• Core Size: 16-Bit
• Speed: 24MHz
• Connectivity: SCI, SmartCard, USB
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 69
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 12K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 6x10b
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 112-LFBGA
• For Use With: HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)3DK2218-SS - KIT DEV H8S/2218 WINDOWS SIDESHW3DK2218 - DEV EVAL KIT H8S/2218
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Transfer requests (activation sources) consist of A/D conversion end interrupt, SCI transmission
complete and reception complete interrupts, and TPU channel 0 to 2 compare match/input capture
A interrupts. Figure 7.5 shows an example of the setting procedure for idle mode.
Rev.7.00 Dec. 24, 2008 Page 182 of 698
REJ09B0074-0700
and transfer destination
Set number of transfers
Set transfer source
Idle mode setting
Read DMABCRL
Set DMABCRH
Figure 7.5 Example of Idle Mode Setting Procedure
Set DMABCRL
Set DMACR
addresses
Idle mode
[1]
[2]
[3]
[4]
[5]
[6]
[1] Set ech bit in DMABCRH.
[2] Set the transfer source address and transfer
[3] Set the number of transfers in ETCR.
[4] Set each bit in DMACR.
[5] Read the DTE bit in DMABCRL as 0.
[6] Set each bit in DMABCRL.
destinatiln address in MAR and IOAR.
· Clear the FAE bit to 0 to select short address
· Specify enabling or disabling of internal
· Set the transfer data size with the DTSZ bit.
· Specify whether MAR is to be incremented or
· Set the RPE bit to 1.
· Specify the transfer direction with the DTDIR
· Select the activation source with bits DTF3 to
· Set the DTIE bit to 1.
· Set the DTE bit to 1 to enable transfer.
mode.
interrupt clearing with the DTA bit.
decremented with the DTID bit.
bit.
DTF0.