DF2218BR24V Renesas Electronics America, DF2218BR24V Datasheet - Page 463

• Manufacturer Part Number: DF2218BR24V
• Description: IC H8S/2218 MCU FLASH 112-LFBGA
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2200r

Specifications of DF2218BR24V

• Core Processor: H8S/2000
• Core Size: 16-Bit
• Speed: 24MHz
• Connectivity: SCI, SmartCard, USB
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 69
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 12K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 6x10b
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 112-LFBGA
• For Use With: HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)3DK2218-SS - KIT DEV H8S/2218 WINDOWS SIDESHW3DK2218 - DEV EVAL KIT H8S/2218
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

12.4.4
Before transmitting and receiving data, you should first clear the TE and RE bits in SCR to 0, then
initialize the SCI as described in a sample flowchart in figure 12.8. When the operating mode, or
transfer format, is changed for example, the TE and RE bits must be cleared to 0 before making the
change using the following procedure. When the TE bit is cleared to 0, the TDRE flag is set to 1.
Note that clearing the RE bit to 0 does not initialize the contents of the RDRF, PER, FER, and
ORER flags, or the contents of RDR. When the external clock is used in asynchronous mode, the
clock must be supplied even during initialization.
Note: * Perform this set operation with the RxD pin in the 1 state. If the RE bit is set to 1 with the RxD pin
SCI Initialization (Asynchronous Mode)
SCR to 1, and set RIE, TIE, TEIE,
Clear TE and RE bits in SCR to 0
Set CKE1 and CKE0 bits in SCR
SMR, SCMR, and SEMRA_0
Set data transfer format in
<Initialization completion>
Set TE and RE* bits in
in the 0 state, it may be misinterpreted as a start bit.
1-bit interval elapsed?
Start initialization
Set value in BRR
(TE, RE bits 0)
and MPIE bits
Figure 12.8 Sample SCI Initialization Flowchart
Yes
Wait
No
[1]
[2]
[3]
[4]
[1]
[2]
[3]
[4]
Set the clock selection in SCR.
Be sure to clear bits RIE, TIE, TEIE, and
MPIE, and bits TE and RE, to 0.
When the clock is selected in
asynchronous mode, it is output
immediately after SCR settings are
made.
Set the data transfer format in SMR,
SCMR, and SEMRA_0.
Write a value corresponding to the bit
rate to BRR. Not necessary if an
external clock or average transfer rate
clock by ACS2 to ACS0 is used.
Wait at least one bit interval, then set the
TE bit or RE bit in SCR to 1. Also set
the RIE, TIE, TEIE, and MPIE bits.
Setting the TE and RE bits enables use
of the TxD and RxD pins.
Rev.7.00 Dec. 24, 2008 Page 407 of 698
REJ09B0074-0700