DF2218BR24V Renesas Electronics America, DF2218BR24V Datasheet - Page 740
![IC H8S/2218 MCU FLASH 112-LFBGA](/photos/12/42/124228/df2218br24v_sml.jpg)
DF2218BR24V
Manufacturer Part Number
DF2218BR24V
Description
IC H8S/2218 MCU FLASH 112-LFBGA
Manufacturer
Renesas Electronics America
Series
H8® H8S/2200r
Specifications of DF2218BR24V
Core Processor
H8S/2000
Core Size
16-Bit
Speed
24MHz
Connectivity
SCI, SmartCard, USB
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
69
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
12K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 6x10b
Oscillator Type
External
Operating Temperature
-20°C ~ 75°C
Package / Case
112-LFBGA
For Use With
HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)3DK2218-SS - KIT DEV H8S/2218 WINDOWS SIDESHW3DK2218 - DEV EVAL KIT H8S/2218
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
DF2218BR24V
Manufacturer:
Renesas Electronics America
Quantity:
10 000
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22.8
General Notice during Design for Printed Circuit Board: Measures for radiation noise caused
by the transient current in this LSI should be taken into consideration. The examples of the
measures are shown below.
• To use a multilayer printed circuit board which includes layers for Vcc and GND.
• To mount by-pass capacitors (approximately 0.1 μF) between the Vcc and GND (Vss) pins,
Characteristics of F-ZTAT and Masked ROM Versions: Though the F-ZTAT version and the
masked ROM version satisfy electrical characteristics described in this manual, the actual value of
electrical characteristics, operating margin, and noise margin may differ due to the differences of
production process, on-chip ROM, and layout patterning.
When the system has been evaluated with the F-ZTAT version, the equivalent evaluation should
be implemented to the masked ROM version when shifted to the masked ROM version.
Rev.7.00 Dec. 24, 2008 Page 684 of 698
REJ09B0074-0700
and the PLLVcc and PLLGND pins, of this LSI.
3. Block erase time (Shows the total period for which the E1-bit FLMCR1 is set. It does not
4. Maximum programming time value
5. Maximum erasure time value
6. Minimum times that guarantee all characteristics after programming. (The guaranteed
7. Reference value when the temperature is 25°C. (It is reference that reprogramming is
8. Data hold characteristics when reprogramming is performed within the range of
Usage Note
include the erase verification time.)
t
range is 1 to the minimum value.)
normally enabled up to this value.)
specifications including the minimum value.
E
(max.) = Wait time after E1 bit set (z) × maximum erasure count (N)
t
p
(max.) = Wait time after P1 bit set (z) × maximum programming count (N1 + N2)
= (Z0 + Z2) × 6 + Z1 × 994
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