DF2218BR24V Renesas Electronics America, DF2218BR24V Datasheet - Page 691

• Manufacturer Part Number: DF2218BR24V
• Description: IC H8S/2218 MCU FLASH 112-LFBGA
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2200r

Specifications of DF2218BR24V

• Core Processor: H8S/2000
• Core Size: 16-Bit
• Speed: 24MHz
• Connectivity: SCI, SmartCard, USB
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 69
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 12K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 6x10b
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 112-LFBGA
• For Use With: HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)3DK2218-SS - KIT DEV H8S/2218 WINDOWS SIDESHW3DK2218 - DEV EVAL KIT H8S/2218
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Register Name
RAM emulation register
Memory address register 0A H
Memory address register 0A L
I/O address register 0A
Transfer count register 0A
Memory address register 0B H
Memory address register 0B L
I/O address register 0B
Transfer count register 0B
Memory address register 1A H
Memory address register 1A L
I/O address register 1A
Transfer count register 1A
Memory address register 1B H
Memory address register 1B L
Timer start register
Timer synchro register
Interrupt priority register A
Interrupt priority register B
Interrupt priority register C
Interrupt priority register D
Interrupt priority register E
Interrupt priority register F
Interrupt priority register G
Interrupt priority register J
Interrupt priority register K
Interrupt priority register M
Bus width control register
Access state control register
Wait control register H
Wait control register L
Bus control register H
Bus control register L
Abbreviation
RAMER
MAR0AH
MAR0AL
IOAR0A
ETCR0A
MAR0BH
MAR0BL
IOAR0B
ETCR0B
MAR1AH
MAR1AL
IOAR1A
ETCR1A
MAR1BH
MAR1BL
TSTR
TSYR
IPRA
IPRB
IPRC
IPRD
IPRE
IPRF
IPRG
IPRJ
IPRK
IPRM
ABWCR
ASTCR
WCRH
WCRL
BCRH
BCRL
Number
of Bits
8
8
8
8
8
16
16
16
16
16
16
16
16
16
16
16
16
16
16
8
8
8
8
8
8
8
8
8
8
8
8
8
8
Address
H'FEDB
H'FEE0
H'FEE2
H'FEE4
H'FEE6
H'FEE8
H'FEEA
H'FEEC
H'FEEE
H'FEF0
H'FEF2
H'FEF4
H'FEF6
H'FEF8
H'FEFA
H'FEB0
H'FEB1
H'FEC0
H'FEC1
H'FEC2
H'FEC3
H'FEC4
H'FEC5
H'FEC6
H'FEC9
H'FECA
H'FECC
H'FED0
H'FED1
H'FED2
H'FED3
H'FED4
H'FED5
Rev.7.00 Dec. 24, 2008 Page 635 of 698
Data Bus
Width
8
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
Number
of Access
States
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
REJ09B0074-0700
Module
TPU
INT
BSC
FLASH
DMAC