DF2218BR24V Renesas Electronics America, DF2218BR24V Datasheet - Page 27

• Manufacturer Part Number: DF2218BR24V
• Description: IC H8S/2218 MCU FLASH 112-LFBGA
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2200r

Specifications of DF2218BR24V

• Core Processor: H8S/2000
• Core Size: 16-Bit
• Speed: 24MHz
• Connectivity: SCI, SmartCard, USB
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 69
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 12K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 6x10b
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 112-LFBGA
• For Use With: HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)3DK2218-SS - KIT DEV H8S/2218 WINDOWS SIDESHW3DK2218 - DEV EVAL KIT H8S/2218
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Section 8 I/O Ports
8.1
8.2
8.3
8.4
8.5
8.6
8.7
7.6.1
7.6.2
7.6.3
7.6.4
7.6.5
7.6.6
Port 1................................................................................................................................. 216
8.1.1
8.1.2
8.1.3
8.1.4
Port 3................................................................................................................................. 223
8.2.1
8.2.2
8.2.3
8.2.4
8.2.5
Port 4................................................................................................................................. 227
8.3.1
8.3.2
Port 7................................................................................................................................. 228
8.4.1
8.4.2
8.4.3
8.4.4
Port 9................................................................................................................................. 232
8.5.1
8.5.2
Port A ................................................................................................................................ 233
8.6.1
8.6.2
8.6.3
8.6.4
8.6.5
8.6.6
8.6.7
Port B (H8S/2218 Group Only) ........................................................................................ 239
8.7.1
8.7.2
DMAC Register Access during Operation........................................................... 207
Module Stop......................................................................................................... 208
Medium-Speed Mode........................................................................................... 208
Activation Source Acceptance ............................................................................. 209
Internal Interrupt after End of Transfer................................................................ 209
Channel Re-Setting .............................................................................................. 209
Port 1 Data Direction Register (P1DDR)............................................................. 216
Port 1 Data Register (P1DR)................................................................................ 217
Port 1 Register (PORT1)...................................................................................... 217
Pin Functions ....................................................................................................... 218
Port 3 Data Direction Register (P3DDR)............................................................. 223
Port 3 Data Register (P3DR)................................................................................ 224
Port 3 Register (PORT3)...................................................................................... 224
Port 3 Open-Drain Control Register (P3ODR) .................................................... 225
Pin Functions ....................................................................................................... 225
Port 4 Register (PORT4)...................................................................................... 227
Pin Function......................................................................................................... 227
Port 7 Data Direction Register (P7DDR)............................................................. 228
Port 7 Data Register (P7DR)................................................................................ 229
Port 7 Register (PORT7)...................................................................................... 230
Pin Functions ....................................................................................................... 231
Port 9 Register (PORT9)...................................................................................... 232
Pin Function......................................................................................................... 232
Port A Data Direction Register (PADDR) ........................................................... 233
Port A Data Register (PADR) .............................................................................. 234
Port A Register (PORTA) .................................................................................... 234
Port A Pull-Up MOS Control Register (PAPCR) ................................................ 235
Port A Open-Drain Control Register (PAODR) .................................................. 235
Pin Functions ....................................................................................................... 236
Port A Input Pull-Up MOS States........................................................................ 238
Port B Data Direction Register (PBDDR)............................................................ 239
Port B Data Register (PBDR) .............................................................................. 240
.............................................................................................................. 211
Rev.7.00 Dec. 24, 2008 Page xxv of liv
REJ09B0074-0700