UPD70F3201YGC-YEU-A Renesas Electronics America, UPD70F3201YGC-YEU-A Datasheet - Page 136

• Manufacturer Part Number: UPD70F3201YGC-YEU-A
• Description: MCU 32BIT I2C 100TQFP
• Manufacturer: Renesas Electronics America
• Series: V850ES/Sx2r

Specifications of UPD70F3201YGC-YEU-A

• Core Processor: RISC
• Core Size: 32-Bit
• Speed: 20MHz
• Connectivity: CSI, EBI/EMI, I²C, UART/USART
• Peripherals: DMA, PWM, WDT
• Number Of I /o: 68
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 2.2 V ~ 2.7 V
• Data Converters: A/D 12x10b; D/A 2x8b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

134
Note When reading or writing bits 8 to 15 of the PF9 register in 8-bit or 1-bit units, specify these bits as bits 0
Cautions 1. The N-ch open-drain output voltage is the normal voltage, not the medium voltage.
(e) Port function register 9 (PF9)
to 7 of the PF9H register.
This 16-bit register specifies normal output or N-ch open-drain output.
The PF9 register can be read or written only in 16-bit units. If the higher 8 bits of the PF9 register are used
as PF9H and the lower 8 bits as PF9L, however, PF9H and PF9L can be manipulated in 8-bit or 1-bit units.
PF9 (PF9H
2. PF9n = 1 is enabled only in the following cases. Otherwise, the setting is prohibited.
3. Follow the procedure below to set N-ch open drain.
n = 1: SO2
n = 2: SCK2
n = 4: SO3
n = 5: SCK3
<1> Set the P9n bit to 1.
<2> Set the PF9n bit to 1.
<3> Set the CSIE2 bit of the CSIM2 register or the CSIE3 bit of the CSIM3 register to 1.
<4> Set the PFC9n bit.
<5> Set the PMC9n bit to 1.
After reset:
Note
)
PF915
PF9n
0000H
15
0
1
0
Normal output
N-ch
Controls normal output or N-ch open-drain output (n = 11, 12, 14, or 15)
PF914
R/W
14
0
open-drain output
CHAPTER 4 PORT FUNCTIONS
User’s Manual U15905EJ2V1UD
Address:
13
0
0
PF9 FFFFFC72H, PF9H FFFFFC73H
PF912
12
0
PF911
11
0
10
0
0
0
9
0
8
0
0