UPD70F3201YGC-YEU-A Renesas Electronics America, UPD70F3201YGC-YEU-A Datasheet - Page 407

• Manufacturer Part Number: UPD70F3201YGC-YEU-A
• Description: MCU 32BIT I2C 100TQFP
• Manufacturer: Renesas Electronics America
• Series: V850ES/Sx2r

Specifications of UPD70F3201YGC-YEU-A

• Core Processor: RISC
• Core Size: 32-Bit
• Speed: 20MHz
• Connectivity: CSI, EBI/EMI, I²C, UART/USART
• Peripherals: DMA, PWM, WDT
• Number Of I /o: 68
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 2.2 V ~ 2.7 V
• Data Converters: A/D 12x10b; D/A 2x8b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Note To cancel master wait, write FFH to IIC or set WREL.
Processing by master device
Transfer lines
WREL
INTIIC
WREL
INTIIC
ACKD
MSTS
Processing by slave device
ACKD
MSTS
ACKE
ACKE
WTIM
WTIM
SPD
TRC
SDA
SPD
TRC
STD
SPT
SCL
STD
SPT
STT
STT
IIC
IIC
H
H
H
H
L
L
L
L
L
Start condition
(When 9-Clock Wait Is Selected for Both Master and Slave) (1/3)
IIC
AD6 AD5 AD4 AD3 AD2 AD1 AD0
1
Figure 15-20. Example of Slave to Master Communication
←
address
2
3
4
(a) Start condition ~ address
User’s Manual U15905EJ2V1UD
5
CHAPTER 15 I
6
7
8
R
2
C BUS
9
IIC
D7
←
1
IIC
data
Note
←
D6
2
FFH Note
D5
3
D4
4
D3
5
D2
6
405