UPD70F3201YGC-YEU-A Renesas Electronics America, UPD70F3201YGC-YEU-A Datasheet - Page 472

• Manufacturer Part Number: UPD70F3201YGC-YEU-A
• Description: MCU 32BIT I2C 100TQFP
• Manufacturer: Renesas Electronics America
• Series: V850ES/Sx2r

Specifications of UPD70F3201YGC-YEU-A

• Core Processor: RISC
• Core Size: 32-Bit
• Speed: 20MHz
• Connectivity: CSI, EBI/EMI, I²C, UART/USART
• Peripherals: DMA, PWM, WDT
• Number Of I /o: 68
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 2.2 V ~ 2.7 V
• Data Converters: A/D 12x10b; D/A 2x8b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

470
Item
Subclock oscillator
CPU
DMA
Interrupt controller
ROM correction
16-bit timer/event counters (TM0, TM1)
8-bit timer/event counters (TM2 to TM5)
Real-timer counter
Watchdog timer
Serial interface
A/D converter
D/A converter
External bus interface
Port function
Internal data
(2) Releasing sub-IDLE mode by RESET pin input
Notes 1.
The same operation as the normal reset operation is performed.
2. If the sub-IDLE mode is set immediately after the D/A conversion has started (during conversion), the
µ
operation continues until the D/A conversion is completed, when the D/A conversion is completed, the
output is retained.
Setting of Sub-IDLE Mode
PD703200Y, 703201Y, 703204Y, 70F3201Y, and 70F3204Y only
CSI0 to CSI4
I
UART0, UART1
2
C
Note 1
Table 18-10. Operation Status in Sub-IDLE Mode
Oscillation enabled
Stops operation
Stops operation
Stops operation
Stops operation
Stops operation
Stops operation
Operable
Stops operation
Operable when SCKn input clock is selected as operation clock (n = 0 to 4)
Stops operation
Stops operation
Stops operation
Stops operation (output is retained)
Refer to CHAPTER 5 BUS CONTROL FUNCTION.
Retains status before sub-IDLE mode was set.
The CPU registers, statuses, data, and all other internal data such as the contents of
the internal RAM are retained as they were before the sub-IDLE mode was set.
CHAPTER 18 STANDBY FUNCTION
When Main Clock Is Oscillating
User’s Manual U15905EJ2V1UD
Operation Status
Note 2
Operable when f
clock
When Main Clock Is Stopped
XT
is selected as count