UPD70F3201YGC-YEU-A Renesas Electronics America, UPD70F3201YGC-YEU-A Datasheet - Page 251

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UPD70F3201YGC-YEU-A

Manufacturer Part Number
UPD70F3201YGC-YEU-A
Description
MCU 32BIT I2C 100TQFP
Manufacturer
Renesas Electronics America
Series
V850ES/Sx2r
Datasheet

Specifications of UPD70F3201YGC-YEU-A

Core Processor
RISC
Core Size
32-Bit
Speed
20MHz
Connectivity
CSI, EBI/EMI, I²C, UART/USART
Peripherals
DMA, PWM, WDT
Number Of I /o
68
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
2.2 V ~ 2.7 V
Data Converters
A/D 12x10b; D/A 2x8b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
UPD70F3201YGC-YEU-A
Manufacturer:
Renesas Electronics America
Quantity:
10 000
8.4.3
register n (CRn).
inverted at an interval specified by the count value preset in the CRn register. In this way, a square wave of any
frequency can be output (duty = 50%) (n = 2 to 5).
A square wave with any frequency can be output at an interval specified by the value preset in 8-bit timer compare
By setting the TOEn bit of 8-bit timer mode control register n (TMCn) to 1, the output status of the TOn pin is
Setting method
<1> Set each register.
<2> When the TMCEn bit of the TMCn register is set to 1, counting starts.
<3> When the values of the TMn register and CRn register match, the timer output F/F is inverted.
<4> Then, the timer F/F is inverted during the same interval and a square wave is output from the TOn pin.
Square-wave output operation (8-bit resolution)
Caution Do not rewrite the value of the CRn register during square-wave output.
• TCLn register: Selects the count clock (t).
• CRn register:
• TMCn register: Stops count operation, selects the mode in which clear & start occurs on a match
Moreover, INTTMn is generated and the TMn register is cleared to 00H.
Compare value (N)
between the TMn register and CRn register.
LVSn
CHAPTER 8 8-BIT TIMER/EVENT COUNTERS 2 TO 5
Enables timer output F/F inversion operation, and enables timer output.
(TMCn register = 00001011B or 00000111B)
1
0
Frequency = 1/2t (N + 1): N = 00H to FFH
LVRn
0
1
User’s Manual U15905EJ2V1UD
High-level output
Low-level output
Timer Output F/F Status Setting
249

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