UPD70F3201YGC-YEU-A Renesas Electronics America, UPD70F3201YGC-YEU-A Datasheet - Page 427

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UPD70F3201YGC-YEU-A

Manufacturer Part Number
UPD70F3201YGC-YEU-A
Description
MCU 32BIT I2C 100TQFP
Manufacturer
Renesas Electronics America
Series
V850ES/Sx2r
Datasheet

Specifications of UPD70F3201YGC-YEU-A

Core Processor
RISC
Core Size
32-Bit
Speed
20MHz
Connectivity
CSI, EBI/EMI, I²C, UART/USART
Peripherals
DMA, PWM, WDT
Number Of I /o
68
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
2.2 V ~ 2.7 V
Data Converters
A/D 12x10b; D/A 2x8b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
UPD70F3201YGC-YEU-A
Manufacturer:
Renesas Electronics America
Quantity:
10 000
and can process a total of 38 to 40 interrupt requests.
occurrence is dependent on program execution.
external sources. Moreover, exception processing can be started by the TRAP instruction (software exception) or by
generation of an exception event (i.e. fetching of an illegal opcode) (exception trap).
17.1 Features
The V850ES/SA2 and V850ES/SA3 are provided with a dedicated interrupt controller (INTC) for interrupt servicing
An interrupt is an event that occurs independently of program execution, and an exception is an event whose
The V850ES/SA2 and V850ES/SA3 can process interrupt requests from the on-chip peripheral hardware and
Interrupt/exception sources are listed in Table 17-1.
Interrupts
• External interrupts: 8 sources (including NMI)
• Internal interrupts:
• 8 levels of programmable priorities (maskable interrupts)
• Multiple interrupt control according to priority
• Masks can be specified for each maskable interrupt request.
• Noise elimination, edge detection, and valid edge specification for external interrupt request signals.
Exceptions
• Software exceptions: 32 sources
• Exception trap:
µ
µ
µ
µ
PD703200, 703201, 70F3201:
PD703200Y, 703201Y, 70F3201Y: 31 sources
PD703204, 70F3204:
PD703204Y, 70F3204Y:
CHAPTER 17 INTERRUPT/EXCEPTION PROCESSING FUNCTION
2 sources (illegal opcode exception, debug trap)
30 sources
31 sources
32 sources
User’s Manual U15905EJ2V1UD
425

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