YLCDRSK2378 Renesas Electronics America, YLCDRSK2378 Datasheet - Page 266

• Manufacturer Part Number: YLCDRSK2378
• Description: KIT DEV EVAL H8S/2378 LCD
• Manufacturer: Renesas Electronics America
• Series: H8®r

Specifications of YLCDRSK2378

• Main Purpose: Displays, LCD Controller
• Embedded: Yes, MCU, 16-Bit
• Utilized Ic / Part: YLCDRSK2378
• Primary Attributes: 5.7" QVGA, Touch Screen
• Secondary Attributes: Source Code on CD, Debugging Requires Emulator Cable E10A USB/JTAG
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Section 6 Bus Controller (BSC)
6.6.8
When DRAM is accessed, a RAS precharge time must be secured. With this LSI, one T
always inserted when DRAM space is accessed. From one to four T
setting bits TPC1 and TPC0 in DRACCR. Set the optimum number of T
DRAM connected and the operating frequency of this LSI. Figure 6.25 shows the timing when
two T
cycles.
Rev.7.00 Mar. 18, 2009 page 198 of 1136
REJ09B0109-0700
Read
Write
Note: n = 2 to 5
p
states are inserted. The setting of bits TPC1 and TPC0 is also valid for T
Precharge State Control
φ
Address bus
RASn (CSn)
UCAS, LCAS
WE (HWR)
OE (RD)
Data bus
WE (HWR)
OE (RD)
Data bus
Figure 6.25 Example of Timing with Two-State Precharge Cycle
T
p1
(RAST = 0, CAST = 0)
Row address
T
p2
High
High
T
r
p
states can be selected by
T
c1
Column address
p
cycles according to the
p
states in refresh
T
c2
p
state is