YLCDRSK2378 Renesas Electronics America, YLCDRSK2378 Datasheet - Page 687

KIT DEV EVAL H8S/2378 LCD

YLCDRSK2378

Manufacturer Part Number
YLCDRSK2378
Description
KIT DEV EVAL H8S/2378 LCD
Manufacturer
Renesas Electronics America
Series
H8®r
Datasheet

Specifications of YLCDRSK2378

Main Purpose
Displays, LCD Controller
Embedded
Yes, MCU, 16-Bit
Utilized Ic / Part
YLCDRSK2378
Primary Attributes
5.7" QVGA, Touch Screen
Secondary Attributes
Source Code on CD, Debugging Requires Emulator Cable E10A USB/JTAG
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
11.10
11.10.1 Module Stop Mode Setting
TPU operation can be disabled or enabled using the module stop control register. The initial
setting is for TPU operation to be halted. Register access is enabled by clearing module stop
mode. For details, refer to section 24, Power-Down Modes.
11.10.2 Input Clock Restrictions
The input clock pulse width must be at least 1.5 states in the case of single-edge detection, and at
least 2.5 states in the case of both-edge detection. The TPU will not operate properly with a
narrower pulse width.
In phase counting mode, the phase difference and overlap between the two input clocks must be at
least 1.5 states, and the pulse width must be at least 2.5 states. Figure 11.44 shows the input clock
conditions in phase counting mode.
Figure 11.44 Phase Difference, Overlap, and Pulse Width in Phase Counting Mode
TCLKA
(TCLKC)
TCLKB
(TCLKD)
Notes: Phase difference and overlap
Usage Notes
Pulse width
Overlap
Pulse width
Phase
rence
diffe-
Overlap
: 1.5 states or more
: 2.5 states or more
Phase
rence
diffe-
Pulse width
Rev.7.00 Mar. 18, 2009 page 619 of 1136
Section 11 16-Bit Timer Pulse Unit (TPU)
Pulse width
Pulse width
REJ09B0109-0700

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