YLCDRSK2378 Renesas Electronics America, YLCDRSK2378 Datasheet - Page 709

KIT DEV EVAL H8S/2378 LCD

YLCDRSK2378

Manufacturer Part Number
YLCDRSK2378
Description
KIT DEV EVAL H8S/2378 LCD
Manufacturer
Renesas Electronics America
Series
H8®r
Datasheet

Specifications of YLCDRSK2378

Main Purpose
Displays, LCD Controller
Embedded
Yes, MCU, 16-Bit
Utilized Ic / Part
YLCDRSK2378
Primary Attributes
5.7" QVGA, Touch Screen
Secondary Attributes
Source Code on CD, Debugging Requires Emulator Cable E10A USB/JTAG
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
12.4
Figure 12.2 shows an overview diagram of the PPG. PPG pulse output is enabled when the
corresponding bits in P1DDR, P2DDR, and NDER are set to 1. An initial output value is
determined by its corresponding PODR initial setting. When the compare match event specified
by PCR occurs, the corresponding NDR bit contents are transferred to PODR to update the output
values. Sequential output of data of up to 16 bits is possible by writing new output data to NDR
before the next compare match.
Pulse output pin
Operation
Figure 12.2 Overview Diagram of PPG
DDR
Normal output/inverted output
Section 12 Programmable Pulse Generator (PPG)
Q
NDER
Q
PODR
C
Output trigger signal
Rev.7.00 Mar. 18, 2009 page 641 of 1136
D
Q
NDR
D
Internal data bus
REJ09B0109-0700

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