YLCDRSK2378 Renesas Electronics America, YLCDRSK2378 Datasheet - Page 805

• Manufacturer Part Number: YLCDRSK2378
• Description: KIT DEV EVAL H8S/2378 LCD
• Manufacturer: Renesas Electronics America
• Series: H8®r

Specifications of YLCDRSK2378

• Main Purpose: Displays, LCD Controller
• Embedded: Yes, MCU, 16-Bit
• Utilized Ic / Part: YLCDRSK2378
• Primary Attributes: 5.7" QVGA, Touch Screen
• Secondary Attributes: Source Code on CD, Debugging Requires Emulator Cable E10A USB/JTAG
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

15.5.2
Figure 15.13 shows a sample flowchart for multiprocessor serial data reception. If the MPIE bit in
SCR is set to 1, data is skipped until data with a 1 multiprocessor bit is received. On receiving data
with a 1 multiprocessor bit, the receive data is transferred to RDR. An RXI interrupt request is
generated at this time. All other SCI operations are the same as in asynchronous mode. Figure
15.12 shows an example of SCI operation for multiprocessor format reception.
MPIE
RDRF
RDR
value
MPIE
RDRF
RDR
value
Multiprocessor Serial Data Reception
1
1
Start
bit
Start
bit
(Example with 8-Bit Data, Multiprocessor Bit, One Stop Bit)
0
0
MPIE = 0
Figure 15.12 Example of SCI Operation in Reception
MPIE = 0
D0
D0
ID1
D1
D1
RXI interrupt
request
(multiprocessor
interrupt)
generated
Data (ID1)
Data (ID2)
RXI interrupt
request
(multiprocessor
interrupt)
generated
D7
D7
(b) Data matches station’s ID
MPB
MPB
(a) Data does not match station’s ID
1
1
RDR data read
and RDRF flag
cleared to 0 in
RXI interrupt
handling routine
RDR data read and
RDRF flag cleared
to 0 in RXI interrupt
handling routine
Section 15 Serial Communication Interface (SCI, IrDA)
Stop
bit
Stop
bit
1
1
Start
bit
Start
bit
0
0
Rev.7.00 Mar. 18, 2009 page 737 of 1136
D0
D0
If not this station’s ID,
MPIE bit is set to 1
again
Matches this station’s ID,
so reception continues, and
data is received in RXI
interrupt handling routine
D1
D1
Data (Data2)
Data (Data1)
ID1
ID2
D7
D7
MPB
MPB
RXI interrupt request is
not generated, and RDR
retains its state
0
0
Stop
bit
Stop
bit
REJ09B0109-0700
MPIE bit set to 1
again
1
1
Idle state
(mark state)
Idle state
(mark state)
1
1
Data2