YLCDRSK2378 Renesas Electronics America, YLCDRSK2378 Datasheet - Page 864

• Manufacturer Part Number: YLCDRSK2378
• Description: KIT DEV EVAL H8S/2378 LCD
• Manufacturer: Renesas Electronics America
• Series: H8®r

Specifications of YLCDRSK2378

• Main Purpose: Displays, LCD Controller
• Embedded: Yes, MCU, 16-Bit
• Utilized Ic / Part: YLCDRSK2378
• Primary Attributes: 5.7" QVGA, Touch Screen
• Secondary Attributes: Source Code on CD, Debugging Requires Emulator Cable E10A USB/JTAG
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Section 16 I
16.4.6
The logic levels at the SCL and SDA pins are routed through noise cancelers before being latched
internally. Figure 16.13 shows a block diagram of the noise canceler circuit.
The noise canceler consists of two cascaded latches and a match detector. The SCL (or SDA)
input signal is sampled on the system clock, but is not passed forward to the next circuit unless the
outputs of both latches agree. If they do not agree, the previous value is held.
16.4.7
Flowcharts in respective modes that use the I
Rev.7.00 Mar. 18, 2009 page 796 of 1136
REJ09B0109-0700
SCL or SDA
input signal
Sampling
clock
Noise Canceler
Example of Use
2
C Bus Interface 2 (IIC2) (Option)
Figure 16.13 Block Diagram of Noise Canceler
Sampling clock
D
System clock
period
Latch
C
Q
D
2
C bus interface are shown in figures 16.14 to 16.17.
Latch
C
Q
March detector
SCL or SDA
Internal
signal