YLCDRSK2378 Renesas Electronics America, YLCDRSK2378 Datasheet - Page 320

KIT DEV EVAL H8S/2378 LCD

YLCDRSK2378

Manufacturer Part Number
YLCDRSK2378
Description
KIT DEV EVAL H8S/2378 LCD
Manufacturer
Renesas Electronics America
Series
H8®r
Datasheet

Specifications of YLCDRSK2378

Main Purpose
Displays, LCD Controller
Embedded
Yes, MCU, 16-Bit
Utilized Ic / Part
YLCDRSK2378
Primary Attributes
5.7" QVGA, Touch Screen
Secondary Attributes
Source Code on CD, Debugging Requires Emulator Cable E10A USB/JTAG
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Section 6 Bus Controller (BSC)
Relationship between Chip Select (CS) Signal and Read (RD) Signal: Depending on the
system’s load conditions, the RD signal may lag behind the CS signal. An example is shown in
figure 6.68. In this case, with the setting for no idle cycle insertion (a), there may be a period of
overlap between the bus cycle A RD signal and the bus cycle B CS signal. Setting idle cycle
insertion, as in (b), however, will prevent any overlap between the RD and CS signals. In the
initial state after reset release, idle cycle insertion (b) is set.
Rev.7.00 Mar. 18, 2009 page 252 of 1136
REJ09B0109-0700
Address bus
CS (area A)
CS (area B)
Figure 6.68 Relationship between Chip Select (CS) and Read (RD)
RD
Overlap period between CS (area B)
and RD may occur
φ
(a) No idle cycle insertion
T
(ICIS1 = 0)
1
Bus cycle A
T
2
T
3
Bus cycle B
T
1
T
2
Address bus
CS (area A)
CS (area B)
RD
φ
T
(b) Idle cycle insertion
1
Bus cycle A
(ICIS1 = 1, initial value)
T
2
T
3
Idle cycle
T
i
Bus cycle B
T
1
T
2

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