YLCDRSK2378 Renesas Electronics America, YLCDRSK2378 Datasheet - Page 396

KIT DEV EVAL H8S/2378 LCD

YLCDRSK2378

Manufacturer Part Number
YLCDRSK2378
Description
KIT DEV EVAL H8S/2378 LCD
Manufacturer
Renesas Electronics America
Series
H8®r
Datasheet

Specifications of YLCDRSK2378

Main Purpose
Displays, LCD Controller
Embedded
Yes, MCU, 16-Bit
Utilized Ic / Part
YLCDRSK2378
Primary Attributes
5.7" QVGA, Touch Screen
Secondary Attributes
Source Code on CD, Debugging Requires Emulator Cable E10A USB/JTAG
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Section 7 DMA Controller (DMAC)
ETCRAL is decremented by 1 each time a byte or word transfer is performed. In response to a
single transfer request, burst transfer is performed until the value in ETCRAL reaches H'00.
ETCRAL is then loaded with the value in ETCRAH. At this time, the value in the MAR register
for which a block designation has been given by the BLKDIR bit in DMACRA is restored in
accordance with the DTSZ, SAID/DAID, and SAIDE/DAIDE bits in DMACR.
Rev.7.00 Mar. 18, 2009 page 328 of 1136
REJ09B0109-0700
Address T
Address B
Legend:
Address
Address
Address
Address
Where :
A
A
T
T
B
B
L
L
N
M
A
B
A
B
A
B
= L
= L
= L
= L
= Value set in MARA
= Value set in MARB
= Value set in ETCRB
= Value set in ETCRAH and ETCRAL
Figure 7.14 Operation in Block Transfer Mode (BLKDIR = 1)
A
B
A
B
+ SAIDE · (–1)
+ DAIDE · (–1)
Block area
SAID
DAID
· (2
· (2
DTSZ
DTSZ
Consecutive transfer
of M bytes or words
is performed in
response to one
request
· (N – 1))
· (M·N – 1))
Transfer
2nd block
1st block
Nth block
Address T
Address B
B
B

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